1 from migen
.fhdl
.std
import *
2 from migen
.genlib
.cdc
import MultiReg
3 from migen
.bank
.description
import *
6 class GPIOIn(Module
, AutoCSR
):
7 def __init__(self
, signal
):
8 self
._in
= CSRStatus(flen(signal
))
9 self
.specials
+= MultiReg(signal
, self
._in
.status
)
12 class GPIOOut(Module
, AutoCSR
):
13 def __init__(self
, signal
):
14 self
._out
= CSRStorage(flen(signal
))
15 self
.comb
+= signal
.eq(self
._out
.storage
)
18 class GPIOInOut(Module
):
19 def __init__(self
, in_signal
, out_signal
):
20 self
.submodules
.gpio_in
= GPIOIn(in_signal
)
21 self
.submodules
.gpio_out
= GPIOOut(out_signal
)
24 return self
.gpio_in
.get_csrs() + self
.gpio_out
.get_csrs()
27 class Blinker(Module
):
28 def __init__(self
, signal
, divbits
=26):
29 counter
= Signal(divbits
)
30 self
.comb
+= signal
.eq(counter
[divbits
-1])
31 self
.sync
+= counter
.eq(counter
+ 1)