misoclib/gensoc/cpuif.py

   1 from migen.bank.description import CSRStatus
   2
   3 def get_cpu_mak(cpu_type):
   4         if cpu_type == "lm32":
   5                 cpuflags = "-mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled"
   6         elif cpu_type == "or1k":
   7                 cpuflags = "-mhard-mul -mhard-div"
   8         else:
   9                 raise ValueError("Unsupported CPU type: "+cpu_type)
  10         return "CPU={}\nCPUFLAGS={}\n".format(cpu_type, cpuflags)
  11
  12 def get_linker_output_format(cpu_type):
  13         return "OUTPUT_FORMAT(\"elf32-{}\")\n".format(cpu_type)
  14
  15 def get_linker_regions(regions):
  16         r = "MEMORY {\n"
  17         for name, origin, length in regions:
  18                 r += "\t{} : ORIGIN = 0x{:08x}, LENGTH = 0x{:08x}\n".format(name, origin, length)
  19         r += "}\n"
  20         return r
  21
  22 def get_mem_header(regions, flash_boot_address):
  23         r = "#ifndef __GENERATED_MEM_H\n#define __GENERATED_MEM_H\n\n"
  24         for name, base, size in regions:
  25                 r += "#define {name}_BASE 0x{base:08x}\n#define {name}_SIZE 0x{size:08x}\n\n".format(name=name.upper(), base=base, size=size)
  26         if flash_boot_address is not None:
  27                 r += "#define FLASH_BOOT_ADDRESS 0x{:08x}\n\n".format(flash_boot_address)
  28         r += "#endif\n"
  29         return r
  30
  31 def _get_rw_functions(reg_name, reg_base, size, read_only):
  32         r = ""
  33
  34         r += "#define CSR_"+reg_name.upper()+"_ADDR "+hex(reg_base)+"\n"
  35         r += "#define CSR_"+reg_name.upper()+"_SIZE "+str(size)+"\n"
  36
  37         if size > 8:
  38                 raise NotImplementedError("Register too large")
  39         elif size > 4:
  40                 ctype = "unsigned long long int"
  41         elif size > 2:
  42                 ctype = "unsigned int"
  43         elif size > 1:
  44                 ctype = "unsigned short int"
  45         else:
  46                 ctype = "unsigned char"
  47
  48         r += "static inline "+ctype+" "+reg_name+"_read(void) {\n"
  49         if size > 1:
  50                 r += "\t"+ctype+" r = MMPTR("+hex(reg_base)+");\n"
  51                 for byte in range(1, size):
  52                         r += "\tr <<= 8;\n\tr |= MMPTR("+hex(reg_base+4*byte)+");\n"
  53                 r += "\treturn r;\n}\n"
  54         else:
  55                 r += "\treturn MMPTR("+hex(reg_base)+");\n}\n"
  56
  57         if not read_only:
  58                 r += "static inline void "+reg_name+"_write("+ctype+" value) {\n"
  59                 for byte in range(size):
  60                         shift = (size-byte-1)*8
  61                         if shift:
  62                                 value_shifted = "value >> "+str(shift)
  63                         else:
  64                                 value_shifted = "value"
  65                         r += "\tMMPTR("+hex(reg_base+4*byte)+") = "+value_shifted+";\n"
  66                 r += "}\n"
  67         return r
  68
  69 def get_csr_header(csr_base, bank_array, interrupt_map):
  70         r = "#ifndef __GENERATED_CSR_H\n#define __GENERATED_CSR_H\n#include <hw/common.h>\n"
  71         for name, csrs, mapaddr, rmap in bank_array.banks:
  72                 r += "\n/* "+name+" */\n"
  73                 reg_base = csr_base + 0x800*mapaddr
  74                 r += "#define "+name.upper()+"_BASE "+hex(reg_base)+"\n"
  75                 for csr in csrs:
  76                         nr = (csr.size + 7)//8
  77                         r += _get_rw_functions(name + "_" + csr.name, reg_base, nr, isinstance(csr, CSRStatus))
  78                         reg_base += 4*nr
  79                 try:
  80                         interrupt_nr = interrupt_map[name]
  81                 except KeyError:
  82                         pass
  83                 else:
  84                         r += "#define "+name.upper()+"_INTERRUPT "+str(interrupt_nr)+"\n"
  85         for name, memory, mapaddr, mmap in bank_array.srams:
  86                 mem_base = csr_base + 0x800*mapaddr
  87                 fullname = name + "_" + memory.name_override
  88                 r += "#define "+fullname.upper()+"_BASE "+hex(mem_base)+"\n"
  89         r += "\n#endif\n"
  90         return r
  91
  92 def get_csr_csv(csr_base, bank_array):
  93         r = ""
  94         for name, csrs, mapaddr, rmap in bank_array.banks:
  95                 reg_base = csr_base + 0x800*mapaddr
  96                 for csr in csrs:
  97                         nr = (csr.size + 7)//8
  98                         r += "{}_{},0x{:08x},{},{}\n".format(name, csr.name, reg_base, nr, "ro" if isinstance(csr, CSRStatus) else "rw")
  99                         reg_base += 4*nr
 100         return r