misoclib/others/mxcrg/__init__.py

   1 from fractions import Fraction
   2
   3 from migen.fhdl.std import *
   4
   5
   6 class MXCRG(Module):
   7     def __init__(self, pads, outfreq1x):
   8         self.clock_domains.cd_sys = ClockDomain()
   9         self.clock_domains.cd_sdram_half = ClockDomain()
  10         self.clock_domains.cd_sdram_full_wr = ClockDomain()
  11         self.clock_domains.cd_sdram_full_rd = ClockDomain()
  12         self.clock_domains.cd_base50 = ClockDomain(reset_less=True)
  13
  14         self.clk4x_wr_strb = Signal()
  15         self.clk4x_rd_strb = Signal()
  16
  17         ###
  18
  19         infreq = 50*1000000
  20         ratio = Fraction(outfreq1x)/Fraction(infreq)
  21         in_period = float(Fraction(1000000000)/Fraction(infreq))
  22
  23         self.specials += Instance("mxcrg",
  24                                   Instance.Parameter("in_period", in_period),
  25                                   Instance.Parameter("f_mult", ratio.numerator),
  26                                   Instance.Parameter("f_div", ratio.denominator),
  27                                   Instance.Input("clk50_pad", pads.clk50),
  28                                   Instance.Input("trigger_reset", pads.trigger_reset),
  29
  30                                   Instance.Output("sys_clk", self.cd_sys.clk),
  31                                   Instance.Output("sys_rst", self.cd_sys.rst),
  32                                   Instance.Output("clk2x_270", self.cd_sdram_half.clk),
  33                                   Instance.Output("clk4x_wr", self.cd_sdram_full_wr.clk),
  34                                   Instance.Output("clk4x_rd", self.cd_sdram_full_rd.clk),
  35                                   Instance.Output("base50_clk", self.cd_base50.clk),
  36
  37                                   Instance.Output("clk4x_wr_strb", self.clk4x_wr_strb),
  38                                   Instance.Output("clk4x_rd_strb", self.clk4x_rd_strb),
  39                                   Instance.Output("norflash_rst_n", pads.norflash_rst_n),
  40                                   Instance.Output("ddr_clk_pad_p", pads.ddr_clk_p),
  41                                   Instance.Output("ddr_clk_pad_n", pads.ddr_clk_n))