10 from mibuild
.tools
import write_to_file
11 from migen
.util
.misc
import autotype
12 from migen
.fhdl
import verilog
, edif
13 from migen
.fhdl
.structure
import _Fragment
14 from migen
.bank
.description
import CSRStatus
15 from mibuild
import tools
16 from mibuild
.xilinx
.common
import *
18 from misoclib
.soc
import cpuif
19 from misoclib
.tools
.litescope
.common
import *
22 def _import(default
, name
):
23 return importlib
.import_module(default
+ "." + name
)
27 parser
= argparse
.ArgumentParser(formatter_class
=argparse
.RawDescriptionHelpFormatter
,
29 LiteScope - based on Migen.
31 This program builds and/or loads LiteScope components.
32 One or several actions can be specified:
34 clean delete previous build(s).
35 build-rtl build verilog rtl.
36 build-bitstream build-bitstream build FPGA bitstream.
37 build-csr-csv save CSR map into CSV file.
39 load-bitstream load bitstream into volatile storage.
41 all clean, build-csr-csv, build-bitstream, load-bitstream.
44 parser
.add_argument("-t", "--target", default
="simple", help="Core type to build")
45 parser
.add_argument("-s", "--sub-target", default
="", help="variant of the Core type to build")
46 parser
.add_argument("-p", "--platform", default
=None, help="platform to build for")
47 parser
.add_argument("-Ot", "--target-option", default
=[], nargs
=2, action
="append", help="set target-specific option")
48 parser
.add_argument("-Op", "--platform-option", default
=[], nargs
=2, action
="append", help="set platform-specific option")
49 parser
.add_argument("--csr_csv", default
="./test/csr.csv", help="CSV file to save the CSR map into")
51 parser
.add_argument("action", nargs
="+", help="specify an action")
53 return parser
.parse_args()
55 # Note: misoclib need to be installed as a python library
57 if __name__
== "__main__":
60 # create top-level Core object
61 target_module
= _import("targets", args
.target
)
63 top_class
= getattr(target_module
, args
.sub_target
)
65 top_class
= target_module
.default_subtarget
67 if args
.platform
is None:
68 if hasattr(top_class
, "default_platform"):
69 platform_name
= top_class
.default_platform
71 raise ValueError("Target has no default platform, specify a platform with -p your_platform")
73 platform_name
= args
.platform
74 platform_module
= _import("mibuild.platforms", platform_name
)
75 platform_kwargs
= dict((k
, autotype(v
)) for k
, v
in args
.platform_option
)
76 platform
= platform_module
.Platform(**platform_kwargs
)
78 build_name
= top_class
.__name
__.lower() + "-" + platform_name
79 top_kwargs
= dict((k
, autotype(v
)) for k
, v
in args
.target_option
)
80 soc
= top_class(platform
, **top_kwargs
)
82 memory_regions
= soc
.get_memory_regions()
83 csr_regions
= soc
.get_csr_regions()
86 action_list
= ["clean", "build-csr-csv", "build-bitstream", "load-bitstream", "all"]
87 actions
= {k
: False for k
in action_list
}
88 for action
in args
.action
:
90 actions
[action
] = True
92 print("Unknown action: "+action
+". Valid actions are:")
99 / / (_) /____ / __/______ ___ ___
100 / /__/ / __/ -_)\ \/ __/ _ \/ _ \/ -_)
101 /____/_/\__/\__/___/\__/\___/ .__/\__/
104 A small footprint and configurable embedded FPGA
105 logic analyzer core powered by Migen
107 ====== Building parameters: ======
118 ===============================""".format(
122 str(soc
.la
.with_subsampler
),
129 actions
["build-csr-csv"] = True
130 actions
["build-bitstream"] = True
131 actions
["load-bitstream"] = True
133 if actions
["build-bitstream"]:
134 actions
["build-csr-csv"] = True
135 actions
["build-bitstream"] = True
136 actions
["load-bitstream"] = True
139 subprocess
.call(["rm", "-rf", "build/*"])
141 if actions
["build-csr-csv"]:
142 csr_csv
= cpuif
.get_csr_csv(csr_regions
)
143 write_to_file(args
.csr_csv
, csr_csv
)
145 if actions
["build-bitstream"]:
146 vns
= platform
.build(soc
, build_name
=build_name
, run
=True)
147 if hasattr(soc
, "do_exit") and vns
is not None:
148 if hasattr(soc
.do_exit
, '__call__'):
151 if actions
["load-bitstream"]:
152 prog
= platform
.create_programmer()
153 prog
.load_bitstream("build/" + build_name
+ platform
.bitstream_ext
)