1 <!-- DRAFT Instructions for PowerISA Version 3.0 B Book 1 -->
2 <!-- https://libre-soc.org/openpower/sv/bitmanip/ -->
3 <!-- https://libre-soc.org/openpower/sv/av_opcodes/ -->
5 # DRAFT Minimum/Maximum (Rc=1)
9 * minmax. RT,RA,RB,MMM (Rc=1)
15 if MMM[0] then # word mode
16 # shift left by XLEN/2 to make the dword comparison
17 # do word comparison of the original inputs
18 a <- a[XLEN/2:XLEN-1] || [0] * XLEN/2
19 b <- b[XLEN/2:XLEN-1] || [0] * XLEN/2
20 if MMM[1] then # signed mode
21 # invert sign bits to make the unsigned comparison
22 # do signed comparison of the original inputs
25 # if Rc = 1 then store the result of comparing a and b to CR0
28 CR0 <- 0b100 || XER[SO]
30 CR0 <- 0b001 || XER[SO]
32 CR0 <- 0b010 || XER[SO]
33 if MMM[2] then # max mode
34 # swap a and b to make the less than comparison do
35 # greater than comparison of the original inputs
39 # store the entire selected source (even in word mode)
40 # if Rc = 1 then store the result of comparing a and b to CR0
41 if a <u b then RT <- (RA|0)
44 Special Registers Altered:
48 # DRAFT Minimum/Maximum
52 * minmax RT,RA,RB,MMM (Rc=0)
58 if MMM[0] then # word mode
59 # shift left by XLEN/2 to make the dword comparison
60 # do word comparison of the original inputs
61 a <- a[XLEN/2:XLEN-1] || [0] * XLEN/2
62 b <- b[XLEN/2:XLEN-1] || [0] * XLEN/2
63 if MMM[1] then # signed mode
64 # invert sign bits to make the unsigned comparison
65 # do signed comparison of the original inputs
68 # if Rc = 1 then store the result of comparing a and b to CR0
71 # CR0 <- 0b100 || XER[SO]
73 # CR0 <- 0b001 || XER[SO]
75 # CR0 <- 0b010 || XER[SO]
76 if MMM[2] then # max mode
77 # swap a and b to make the less than comparison do
78 # greater than comparison of the original inputs
82 # store the entire selected source (even in word mode)
83 # if Rc = 1 then store the result of comparing a and b to CR0
84 if a <u b then RT <- (RA|0)
87 Special Registers Altered:
95 * avgadd RT,RA,RB (Rc=0)
96 * avgadd. RT,RA,RB (Rc=1)
107 Special Registers Altered:
111 # DRAFT Absolute Signed Difference
115 * absds RT,RA,RB (Rc=0)
116 * absds. RT,RA,RB (Rc=1)
120 if (RA) < (RB) then RT <- ¬(RA) + (RB) + 1
121 else RT <- ¬(RB) + (RA) + 1
123 Special Registers Altered:
127 # DRAFT Absolute Unsigned Difference
131 * absdu RT,RA,RB (Rc=0)
132 * absdu. RT,RA,RB (Rc=1)
136 if (RA) <u (RB) then RT <- ¬(RA) + (RB) + 1
137 else RT <- ¬(RB) + (RA) + 1
139 Special Registers Altered:
143 # DRAFT Absolute Accumulate Unsigned Difference
147 * absdacu RT,RA,RB (Rc=0)
148 * absdacu. RT,RA,RB (Rc=1)
152 if (RA) <u (RB) then r <- ¬(RA) + (RB) + 1
153 else r <- ¬(RB) + (RA) + 1
156 Special Registers Altered:
160 # DRAFT Absolute Accumulate Signed Difference
164 * absdacs RT,RA,RB (Rc=0)
165 * absdacs. RT,RA,RB (Rc=1)
169 if (RA) < (RB) then r <- ¬(RA) + (RB) + 1
170 else r <- ¬(RB) + (RA) + 1
173 Special Registers Altered:
181 * cprop RT,RA,RB (Rc=0)
182 * cprop. RT,RA,RB (Rc=1)
191 Special Registers Altered:
195 # DRAFT Bitmanip Masked
199 * bmask RT,RA,RB,bm,L
203 if _RB = 0 then mask <- [1] * XLEN
207 if bm[4] = 0 then a1 <- ¬ra
209 if mode2 = 0 then a2 <- (¬ra)+1
210 if mode2 = 1 then a2 <- ra-1
211 if mode2 = 2 then a2 <- ra+1
212 if mode2 = 3 then a2 <- ¬(ra+1)
217 if mode3 = 0 then result <- a1 | a2
218 if mode3 = 1 then result <- a1 & a2
219 if mode3 = 2 then result <- a1 ^ a2
220 if mode3 = 3 then result <- undefined([0]*XLEN)
221 result <- result & mask
222 # optionally restore masked-out bits
224 result <- result | (RA & ¬mask)
227 Special Registers Altered:
231 # Load Floating-Point Immediate
239 bf16 <- d0 || d1 || d2
240 fp32 <- bf16 || [0]*16
243 Special Registers Altered:
247 # Float Replace Lower-Half Single, Immediate
255 fp32 <- SINGLE((FRS))
256 fp32[16:31] <- d0 || d1 || d2
259 Special Registers Altered: