1 <!-- DRAFT Instructions for PowerISA Version 3.0 B Book 1 -->
2 <!-- https://libre-soc.org/openpower/sv/bitmanip/ -->
3 <!-- https://libre-soc.org/openpower/sv/av_opcodes/ -->
5 # DRAFT Minimum/Maximum (Rc=1)
9 * minmax. RT,RA,RB,MMM (Rc=1)
13 [[!inline pagenames="openpower/isa/av/minmax." raw="yes"]]
15 Special Registers Altered:
19 # DRAFT Minimum/Maximum
23 * minmax RT,RA,RB,MMM (Rc=0)
29 if MMM[0] then # word mode
30 # shift left by XLEN/2 to make the dword comparison
31 # do word comparison of the original inputs
32 a <- a[XLEN/2:XLEN-1] || [0] * XLEN/2
33 b <- b[XLEN/2:XLEN-1] || [0] * XLEN/2
34 if MMM[1] then # signed mode
35 # invert sign bits to make the unsigned comparison
36 # do signed comparison of the original inputs
39 # if Rc = 1 then store the result of comparing a and b to CR0
42 # CR0 <- 0b100 || XER[SO]
44 # CR0 <- 0b001 || XER[SO]
46 # CR0 <- 0b010 || XER[SO]
47 if MMM[2] then # max mode
48 # swap a and b to make the less than comparison do
49 # greater than comparison of the original inputs
53 # store the entire selected source (even in word mode)
54 # if Rc = 1 then store the result of comparing a and b to CR0
55 if a <u b then RT <- (RA|0)
58 Special Registers Altered:
66 * avgadd RT,RA,RB (Rc=0)
67 * avgadd. RT,RA,RB (Rc=1)
78 Special Registers Altered:
82 # DRAFT Absolute Signed Difference
86 * absds RT,RA,RB (Rc=0)
87 * absds. RT,RA,RB (Rc=1)
91 if (RA) < (RB) then RT <- ¬(RA) + (RB) + 1
92 else RT <- ¬(RB) + (RA) + 1
94 Special Registers Altered:
98 # DRAFT Absolute Unsigned Difference
102 * absdu RT,RA,RB (Rc=0)
103 * absdu. RT,RA,RB (Rc=1)
107 if (RA) <u (RB) then RT <- ¬(RA) + (RB) + 1
108 else RT <- ¬(RB) + (RA) + 1
110 Special Registers Altered:
114 # DRAFT Absolute Accumulate Unsigned Difference
118 * absdacu RT,RA,RB (Rc=0)
119 * absdacu. RT,RA,RB (Rc=1)
123 if (RA) <u (RB) then r <- ¬(RA) + (RB) + 1
124 else r <- ¬(RB) + (RA) + 1
127 Special Registers Altered:
131 # DRAFT Absolute Accumulate Signed Difference
135 * absdacs RT,RA,RB (Rc=0)
136 * absdacs. RT,RA,RB (Rc=1)
140 if (RA) < (RB) then r <- ¬(RA) + (RB) + 1
141 else r <- ¬(RB) + (RA) + 1
144 Special Registers Altered:
152 * cprop RT,RA,RB (Rc=0)
153 * cprop. RT,RA,RB (Rc=1)
162 Special Registers Altered:
166 # DRAFT Bitmanip Masked
170 * bmask RT,RA,RB,bm,L
174 if _RB = 0 then mask <- [1] * XLEN
178 if bm[4] = 0 then a1 <- ¬ra
180 if mode2 = 0 then a2 <- (¬ra)+1
181 if mode2 = 1 then a2 <- ra-1
182 if mode2 = 2 then a2 <- ra+1
183 if mode2 = 3 then a2 <- ¬(ra+1)
188 if mode3 = 0 then result <- a1 | a2
189 if mode3 = 1 then result <- a1 & a2
190 if mode3 = 2 then result <- a1 ^ a2
191 if mode3 = 3 then result <- undefined([0]*XLEN)
192 result <- result & mask
193 # optionally restore masked-out bits
195 result <- result | (RA & ¬mask)
198 Special Registers Altered:
202 # Load Floating-Point Immediate
210 bf16 <- d0 || d1 || d2
211 fp32 <- bf16 || [0]*16
214 Special Registers Altered:
218 # Float Replace Lower-Half Single, Immediate
226 fp32 <- SINGLE((FRS))
227 fp32[16:31] <- d0 || d1 || d2
230 Special Registers Altered: