Handle large 64-bit values, but only the low 64-bit half of the multiplication, add...
[openpower-isa.git] / openpower / isa / butterfly.mdwn
1 <!-- SVP64 Butterfly DCT Instructions here described are based on -->
2
3 <!-- PLEASE NOTE THESE ARE UNAPPROVED AND DRAFT, NOT SUBMITTED TO OPF ISA WG -->
4
5 # [DRAFT] Integer Butterfly Multiply Add/Sub FFT/DCT
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7 A-Form
8
9 * maddsubrs RT,RA,SH,RB
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11 Pseudo-code:
12
13 n <- SH
14 sum <- (RT) + (RA)
15 diff <- (RT) - (RA)
16 prod1 <- MULS(RB, sum)
17 prod1_lo <- prod1[XLEN:(XLEN*2)-1]
18 prod2 <- MULS(RB, diff)
19 prod2_lo <- prod2[XLEN:(XLEN*2)-1]
20 if n = 0 then
21 RT <- prod1_lo
22 RS <- prod2_lo
23 else
24 if n = 1 then
25 round <- [0]*(XLEN -n) || [1]*1
26 else
27 round <- [0]*(XLEN -n) || [1]*1 || [0]*(n-1)
28 prod1_lo <- prod1_lo + round
29 prod2_lo <- prod2_lo + round
30 m <- MASK(n, (XLEN-1))
31 res1 <- ROTL64(prod1_lo, XLEN-n) & m
32 res2 <- ROTL64(prod2_lo, XLEN-n) & m
33 signbit1 <- prod1_lo[0]
34 signbit2 <- prod2_lo[0]
35 smask1 <- ([signbit1]*XLEN) & ¬m
36 smask2 <- ([signbit2]*XLEN) & ¬m
37 RT <- (res1 | smask1)
38 RS <- (res2 | smask2)
39
40 Special Registers Altered:
41
42 None