openpower/isa/butterfly.mdwn

   1 <!-- SVP64 Butterfly DCT Instructions here described are based on -->
   2
   3 <!-- PLEASE NOTE THESE ARE UNAPPROVED AND DRAFT, NOT SUBMITTED TO OPF ISA WG -->
   4
   5 # [DRAFT] Integer Butterfly Multiply Add/Sub FFT/DCT
   6
   7 A-Form
   8
   9 * maddsubrs  RT,RA,SH,RB
  10
  11 Pseudo-code:
  12
  13     n <- SH
  14     sum <- (RT) + (RA)
  15     diff <- (RT) - (RA)
  16     prod1 <- MULS(RB, sum)
  17     prod2 <- MULS(RB, diff)
  18     if n = 0 then
  19         prod1_lo <- prod1[XLEN:(XLEN*2)-1]
  20         prod2_lo <- prod2[XLEN:(XLEN*2)-1]
  21         RT <- prod1_lo
  22         RS <- prod2_lo
  23     else
  24         if XLEN = 64 then
  25             prod1_lo <- prod1[XLEN:(XLEN*2)-1]
  26             prod2_lo <- prod2[XLEN:(XLEN*2)-1]
  27             round <- [0]*XLEN
  28             round[XLEN -n] <- 1
  29             prod1_lo <- prod1_lo + round
  30             prod2_lo <- prod2_lo + round
  31             m <- MASK(n, (XLEN-1))
  32             res1 <- ROTL64(prod1_lo, XLEN-n) & m
  33             res2 <- ROTL64(prod2_lo, XLEN-n) & m
  34             signbit1 <- prod1_lo[0]
  35             signbit2 <- prod2_lo[0]
  36             smask1 <- ([signbit1]*XLEN) & ¬m
  37             smask2 <- ([signbit2]*XLEN) & ¬m
  38             RT <- (res1 | smask1)
  39             RS <- (res2 | smask2)
  40         else
  41             round <- [0]*(XLEN*2)
  42             round[XLEN*2 -n] <- 1
  43             prod1 <- prod1 + round
  44             prod2 <- prod2 + round
  45             m <- MASK(XLEN-n, XLEN-1)
  46             res1 <- prod1[XLEN-n:XLEN*2 -n -1]
  47             res2 <- prod2[XLEN-n:XLEN*2 -n -1]
  48             signbit1 <- prod1[0]
  49             signbit2 <- prod2[0]
  50             smask1 <- ([signbit1]*XLEN) & ¬m
  51             smask2 <- ([signbit2]*XLEN) & ¬m
  52             RT <- (res1 | smask1)
  53             RS <- (res2 | smask2)
  54
  55 Special Registers Altered:
  56
  57     None
  58
  59 # [DRAFT] Integer Butterfly Multiply Add and Accumulate FFT/DCT
  60
  61 A-Form
  62
  63 * maddrs  RT,RA,SH,RB
  64
  65 Pseudo-code:
  66
  67     n <- SH
  68     prod <- MULS(RB, RA)
  69     if n = 0 then
  70         prod_lo <- prod[XLEN:(XLEN*2)-1]
  71         RT <- (RT) + prod_lo
  72         RS <- (RS) - prod_lo
  73     else
  74         if XLEN = 64 then
  75             prod_lo <- prod[XLEN:(XLEN*2)-1]
  76             res1 <- (RT) + prod_lo
  77             res2 <- (RS) - prod_lo
  78             round <- [0]*XLEN
  79             round[XLEN -n] <- 1
  80             res1 <- res1 + round
  81             res2 <- res2 + round
  82             signbit1 <- res1[0]
  83             signbit2 <- res2[0]
  84             m <- MASK(n, (XLEN-1))
  85             res1 <- ROTL64(res1, XLEN-n) & m
  86             res2 <- ROTL64(res2, XLEN-n) & m
  87             smask1 <- ([signbit1]*XLEN) & ¬m
  88             smask2 <- ([signbit2]*XLEN) & ¬m
  89             RT <- (res1 | smask1)
  90             RS <- (res2 | smask2)
  91         else
  92             res1 <- (RT) + prod
  93             res2 <- (RS) - prod
  94             round <- [0]*XLEN*2
  95             round[XLEN*2 -n] <- 1
  96             res1 <- res1 + round
  97             res2 <- res2 + round
  98             signbit1 <- res1[0]
  99             signbit2 <- res2[0]
 100             m <- MASK(XLEN-n, (XLEN-1))
 101             res1 <- prod1[XLEN-n:XLEN*2 -n -1]
 102             res2 <- prod2[XLEN-n:XLEN*2 -n -1]
 103             smask1 <- ([signbit1]*XLEN) & ¬m
 104             smask2 <- ([signbit2]*XLEN) & ¬m
 105             RT <- (res1 | smask1)
 106             RS <- (res2 | smask2)
 107
 108 Special Registers Altered:
 109
 110     None