1 <!-- Instructions here described in PowerISA Version 3.0 B Book 1 -->
3 <!-- Section 4.4.1 Fixed-Point Load and Store Caching Inhibited Instructions. Pages 965 - 967 -->
5 <!-- The storage accesses caused by the instructions described in this section are -->
6 <!-- performed as though the specified storage location is Caching Inhibited and -->
7 <!-- Guarded. The instructions can be executed only in hypervisor state. Software -->
8 <!-- must ensure that the specified storage location is not in the caches. If the -->
9 <!-- specified storage location is in a cache, the results are undefined. -->
12 # Load Byte and Zero Caching Inhibited Indexed
22 RT <- [0] * 56 || MEM(EA, 1)
24 Special Registers Altered:
28 # Load Halfword and Zero Caching Inhibited Indexed
38 RT <- [0] * 48 || MEM(EA, 2)
40 Special Registers Altered:
44 # Load Word and Zero Caching Inhibited Indexed
54 RT <- [0] * 32 || MEM(EA, 4)
56 Special Registers Altered:
60 # Load Doubleword Caching Inhibited Indexed
72 Special Registers Altered:
76 # Store Byte Caching Inhibited Indexed
86 MEM(EA, 1) <- (RS)[56:63]
88 Special Registers Altered:
92 # Store Halfword Caching Inhibited Indexed
102 MEM(EA, 2) <- (RS)[48:63]
104 Special Registers Altered:
108 # Store Word Caching Inhibited Indexed
118 MEM(EA, 4) <- (RS)[32:63]
120 Special Registers Altered:
124 # Store Doubleword Caching Inhibited Indexed
136 Special Registers Altered:
140 <!-- Checked March 2021 -->