change extsb/h/w to scale based on XLEN rather than extending from a fixed width
[openpower-isa.git] / openpower / isa / fixedlogical.mdwn
1 <!-- This defines instructions described in PowerISA Version 3.0 B Book 1 -->
2
3 <!-- Section 3.3.13 Fixed-Point Logical Instructions page 92 - 100 -->
4
5 <!-- The Logical instructions perform bit-parallel operations on 64-bit operands. -->
6
7 <!-- The X-form Logical instructions with Rc=1, and the D-form Logical instructions -->
8 <!-- andi. and andis., set the first three bits of CR Field 0 as described in -->
9 <!-- Section 3.3.8, “Other Fixed-Point Instructions” on page 66. The Logical -->
10 <!-- instructions do not change the SO, OV, OV32, CA, and CA32 bits in the XER. -->
11
12
13 # AND Immediate
14
15 D-Form
16
17 * andi. RA,RS,UI
18
19 Pseudo-code:
20
21 RA <- (RS) & XLCASTU(UI)
22
23 Special Registers Altered:
24
25 CR0
26
27 # OR Immediate
28
29 D-Form
30
31 * ori RA,RS,UI
32
33 Pseudo-code:
34
35 RA <- (RS) | XLCASTU(UI)
36
37 Special Registers Altered:
38
39 None
40
41 # AND Immediate Shifted
42
43 D-Form
44
45 * andis. RA,RS,UI
46
47 Pseudo-code:
48
49 RA <- (RS) & XLCASTU(UI || [0]*16)
50
51 Special Registers Altered:
52
53 CR0
54
55 # OR Immediate Shifted
56
57 D-Form
58
59 * oris RA,RS,UI
60
61 Pseudo-code:
62
63 RA <- (RS) | XLCASTU(UI || [0]*16)
64
65 Special Registers Altered:
66
67 None
68
69 # XOR Immediate Shifted
70
71 D-Form
72
73 * xoris RA,RS,UI
74
75 Pseudo-code:
76
77 RA <- (RS) ^ XLCASTU(UI || [0]*16)
78
79 Special Registers Altered:
80
81 None
82
83 # XOR Immediate
84
85 D-Form
86
87 * xori RA,RS,UI
88
89 Pseudo-code:
90
91 RA <- (RS) ^ XLCASTU(UI)
92
93 Special Registers Altered:
94
95 None
96
97 # AND
98
99 X-Form
100
101 * and RA,RS,RB (Rc=0)
102 * and. RA,RS,RB (Rc=1)
103
104 Pseudo-code:
105
106 RA <- (RS) & (RB)
107
108 Special Registers Altered:
109
110 CR0 (if Rc=1)
111
112 # OR
113
114 X-Form
115
116 * or RA,RS,RB (Rc=0)
117 * or. RA,RS,RB (Rc=1)
118
119 Pseudo-code:
120
121 RA <- (RS) | (RB)
122
123 Special Registers Altered:
124
125 CR0 (if Rc=1)
126
127 # XOR
128
129 X-Form
130
131 * xor RA,RS,RB (Rc=0)
132 * xor. RA,RS,RB (Rc=1)
133
134 Pseudo-code:
135
136 RA <- (RS) ^ (RB)
137
138 Special Registers Altered:
139
140 CR0 (if Rc=1)
141
142 # NAND
143
144 X-Form
145
146 * nand RA,RS,RB (Rc=0)
147 * nand. RA,RS,RB (Rc=1)
148
149 Pseudo-code:
150
151 RA <- ¬((RS) & (RB))
152
153 Special Registers Altered:
154
155 CR0 (if Rc=1)
156
157 # NOR
158
159 X-Form
160
161 * nor RA,RS,RB (Rc=0)
162 * nor. RA,RS,RB (Rc=1)
163
164 Pseudo-code:
165
166 RA <- ¬((RS) | (RB))
167
168 Special Registers Altered:
169
170 CR0 (if Rc=1)
171
172 # Equivalent
173
174 X-Form
175
176 * eqv RA,RS,RB (Rc=0)
177 * eqv. RA,RS,RB (Rc=1)
178
179 Pseudo-code:
180
181 RA <- ¬((RS) ^ (RB))
182
183 Special Registers Altered:
184
185 CR0 (if Rc=1)
186
187 # AND with Complement
188
189 X-Form
190
191 * andc RA,RS,RB (Rc=0)
192 * andc. RA,RS,RB (Rc=1)
193
194 Pseudo-code:
195
196 RA <- (RS) & ¬(RB)
197
198 Special Registers Altered:
199
200 CR0 (if Rc=1)
201
202 # OR with Complement
203
204 X-Form
205
206 * orc RA,RS,RB (Rc=0)
207 * orc. RA,RS,RB (Rc=1)
208
209 Pseudo-code:
210
211 RA <- (RS) | ¬(RB)
212
213 Special Registers Altered:
214
215 CR0 (if Rc=1)
216
217 # Extend Sign Byte
218
219 X-Form
220
221 * extsb RA,RS (Rc=0)
222 * extsb. RA,RS (Rc=1)
223
224 Pseudo-code:
225
226 RA <- EXTSXL(RS, XLEN/8)
227
228 Special Registers Altered:
229
230 CR0 (if Rc=1)
231
232 # Extend Sign Halfword
233
234 X-Form
235
236 * extsh RA,RS (Rc=0)
237 * extsh. RA,RS (Rc=1)
238
239 Pseudo-code:
240
241 RA <- EXTSXL(RS, XLEN/4)
242
243 Special Registers Altered:
244
245 CR0 (if Rc=1)
246
247 # Count Leading Zeros Word
248
249 X-Form
250
251 * cntlzw RA,RS (Rc=0)
252 * cntlzw. RA,RS (Rc=1)
253
254 Pseudo-code:
255
256 n <- (XLEN/2)
257 do while n < XLEN
258 if (RS)[n] = 1 then
259 leave
260 n <- n + 1
261 RA <- n - (XLEN/2)
262
263 Special Registers Altered:
264
265 CR0 (if Rc=1)
266
267 # Count Trailing Zeros Word
268
269 X-Form
270
271 * cnttzw RA,RS (Rc=0)
272 * cnttzw. RA,RS (Rc=1)
273
274 Pseudo-code:
275
276 n <- 0
277 do while n < 32
278 if (RS)[63-n] = 0b1 then
279 leave
280 n <- n + 1
281 RA <- EXTZ64(n)
282
283 Special Registers Altered:
284
285 CR0 (if Rc=1)
286
287 # Compare Bytes
288
289 X-Form
290
291 * cmpb RA,RS,RB
292
293 Pseudo-code:
294
295 do n = 0 to ((XLEN/8)-1)
296 if RS[8*n:8* n+7] = (RB)[8*n:8*n+7] then
297 RA[8*n:8* n+7] <- [1]*8
298 else
299 RA[8*n:8* n+7] <- [0]*8
300
301 Special Registers Altered:
302
303 None
304
305 # Population Count Bytes
306
307 X-Form
308
309 * popcntb RA,RS
310
311 Pseudo-code:
312
313 do i = 0 to ((XLEN/8)-1)
314 n <- 0
315 do j = 0 to 7
316 if (RS)[(i*8)+j] = 1 then
317 n <- n+1
318 RA[(i*8):(i*8)+7] <- n
319
320 Special Registers Altered:
321
322 None
323
324 # Population Count Words
325
326 X-Form
327
328 * popcntw RA,RS
329
330 Pseudo-code:
331
332 e <- (XLEN/2)-1
333 do i = 0 to 1
334 s <- i*XLEN/2
335 n <- 0
336 do j = 0 to e
337 if (RS)[s+j] = 1 then
338 n <- n+1
339 RA[s:s+e] <- n
340
341 Special Registers Altered:
342
343 None
344
345 # Parity Doubleword
346
347 X-Form
348
349 * prtyd RA,RS
350
351 Pseudo-code:
352
353 s <- 0
354 do i = 0 to ((XLEN/8)-1)
355 s <- s ^ (RS)[i*8+7]
356 RA <- [0] * (XLEN-1) || s
357
358 Special Registers Altered:
359
360 None
361
362 # Parity Word
363
364 X-Form
365
366 * prtyw RA,RS
367
368 Pseudo-code:
369
370 s <- 0
371 t <- 0
372 do i = 0 to ((XLEN/8/2)-1)
373 s <- s ^ (RS)[i*8+7]
374 do i = 4 to ((XLEN/8)-1)
375 t <- t ^ (RS)[i*8+7]
376 RA[0:(XLEN/2)-1] <- [0]*((XLEN/2)-1) || s
377 RA[XLEN/2:XLEN-1] <- [0]*((XLEN/2)-1) || t
378
379 Special Registers Altered:
380
381 None
382
383 # Extend Sign Word
384
385 X-Form
386
387 * extsw RA,RS (Rc=0)
388 * extsw. RA,RS (Rc=1)
389
390 Pseudo-code:
391
392 RA <- EXTSXL(RS, XLEN/2)
393
394 Special Registers Altered:
395
396 CR0 (if Rc=1)
397
398 # Population Count Doubleword
399
400 X-Form
401
402 * popcntd RA,RS
403
404 Pseudo-code:
405
406 n <- 0
407 do i = 0 to (XLEN-1)
408 if (RS)[i] = 1 then
409 n <- n+1
410 RA <- n
411
412 Special Registers Altered:
413
414 None
415
416 # Count Leading Zeros Doubleword
417
418 X-Form
419
420 * cntlzd RA,RS (Rc=0)
421 * cntlzd. RA,RS (Rc=1)
422
423 Pseudo-code:
424
425 n <- 0
426 do while n < XLEN
427 if (RS)[n] = 1 then
428 leave
429 n <- n + 1
430 RA <- n
431
432 Special Registers Altered:
433
434 CR0 (if Rc=1)
435
436 # Count Trailing Zeros Doubleword
437
438 X-Form
439
440 * cnttzd RA,RS (Rc=0)
441 * cnttzd. RA,RS (Rc=1)
442
443 Pseudo-code:
444
445 n <- 0
446 do while n < XLEN
447 if (RS)[XLEN-1-n] = 0b1 then
448 leave
449 n <- n + 1
450 RA <- EXTZ64(n)
451
452 Special Registers Altered:
453
454 CR0 (if Rc=1)
455
456 # Bit Permute Doubleword
457
458 X-Form
459
460 * bpermd RA,RS,RB
461
462 Pseudo-code:
463
464 perm <- [0] * 8
465 for i = 0 to ((XLEN/8)-1)
466 index <- (RS)[8*i:8*i+7]
467 if index <u XLEN then
468 perm[i] <- (RB)[index]
469 else
470 perm[i] <- 0
471 RA <- [0]*(XLEN-8) || perm[0:7]
472
473 Special Registers Altered:
474
475 None
476
477 <!-- Checked March 2021 -->