openpower/isa/fixedsync.mdwn

   1 <!-- X Instructions here described in PowerISA Version 3.0 B Book 1 -->
   2
   3 <!-- Section 4.6 Fixed-point Synchronisation instructions. Pages 865 - 877 -->
   4
   5 # Instruction Synchronise
   6
   7 XL-Form
   8
   9 * isync
  10
  11 Pseudo-code:
  12
  13     # TODO
  14     undefined(0)
  15
  16 Special Registers Altered:
  17
  18     None
  19
  20 # Load Byte And Reserve Indexed
  21
  22 X-Form
  23
  24 * lbarx RT,RA,RB,EH
  25
  26 Pseudo-code:
  27
  28     EA <- (RA|0) + (RB)
  29     RESERVE <- 1
  30     RESERVE_LENGTH <- 1
  31     RESERVE_ADDR <- real_addr(EA)
  32     RT <- [0]*56 || MEM(EA, 1)
  33
  34 Special Registers Altered:
  35
  36     None
  37
  38 # Load Halfword And Reserve Indexed
  39
  40 X-Form
  41
  42 * lharx RT,RA,RB,EH
  43
  44 Pseudo-code:
  45
  46     EA <- (RA|0) + (RB)
  47     RESERVE <- 1
  48     RESERVE_LENGTH <- 2
  49     RESERVE_ADDR <- real_addr(EA)
  50     RT <- [0]*48 || MEM(EA, 2)
  51
  52 Special Registers Altered:
  53
  54     None
  55
  56 # Load Word And Reserve Indexed
  57
  58 X-Form
  59
  60 * lwarx RT,RA,RB,EH
  61
  62 Pseudo-code:
  63
  64     EA <- (RA|0) + (RB)
  65     RESERVE <- 1
  66     RESERVE_LENGTH <- 4
  67     RESERVE_ADDR <- real_addr(EA)
  68     RT <- [0]*32 || MEM(EA, 4)
  69
  70 Special Registers Altered:
  71
  72     None
  73
  74 # Load Doubleword And Reserve Indexed
  75
  76 X-Form
  77
  78 * ldarx RT,RA,RB,EH
  79
  80 Pseudo-code:
  81
  82     EA <- (RA|0) + (RB)
  83     RESERVE <- 1
  84     RESERVE_LENGTH <- 8
  85     RESERVE_ADDR <- real_addr(EA)
  86     RT <- MEM(EA, 8)
  87
  88 Special Registers Altered:
  89
  90     None
  91
  92 # Load Quadword And Reserve Indexed
  93
  94 X-Form
  95
  96 * lqarx RTp,RA,RB,EH
  97
  98 Pseudo-code:
  99
 100     EA <- (RA|0) + (RB)
 101     RESERVE <- 1
 102     RESERVE_LENGTH <- 16
 103     RESERVE_ADDR <- real_addr(EA)
 104     RTp <- MEM(EA, 16)
 105
 106 Special Registers Altered:
 107
 108     None
 109
 110 # Store Byte Conditional Indexed
 111
 112 X-Form
 113
 114 * stbcx. RS,RA,RB
 115
 116 Pseudo-code:
 117
 118     EA <- (RA|0) + (RB)
 119     undefined_case <- 0
 120     store_performed <- 0b0
 121     if RESERVE then
 122         if ((RESERVE_LENGTH = 1) &
 123            (RESERVE_ADDR = real_addr(EA))) then
 124             MEM(EA, 1) <- (RS)[56:63]
 125             undefined_case <- 0
 126             store_performed <- 0b1
 127         else
 128             # set z to smallest real page size supported by implementation
 129             z <- REAL_PAGE_SIZE
 130             if (RESERVE_ADDR / z) = (real_addr(EA) / z) then
 131                 undefined_case <- 1
 132             else
 133                 undefined_case <- 0
 134                 store_performed <- 0b0
 135     else
 136         undefined_case <- 0
 137         store_performed <- 0b0
 138     if undefined_case then
 139         u1 <- undefined(0b1)
 140         if u1 then
 141             MEM(EA, 1) <- (RS)[56:63]
 142         u2 <- undefined(0b1)
 143         CR0 <- 0b00 || u2 || XER[SO]
 144     else
 145         CR0 <- 0b00 || store_performed || XER[SO]
 146     RESERVE <- 0
 147
 148 Special Registers Altered:
 149
 150     CR0
 151
 152 # Store Halfword Conditional Indexed
 153
 154 X-Form
 155
 156 * sthcx. RS,RA,RB
 157
 158 Pseudo-code:
 159
 160     EA <- (RA|0) + (RB)
 161     undefined_case <- 0
 162     store_performed <- 0b0
 163     if RESERVE then
 164         if ((RESERVE_LENGTH = 2) &
 165            (RESERVE_ADDR = real_addr(EA))) then
 166             MEM(EA, 2) <- (RS)[48:63]
 167             undefined_case <- 0
 168             store_performed <- 0b1
 169         else
 170             # set z to smallest real page size supported by implementation
 171             z <- REAL_PAGE_SIZE
 172             if (RESERVE_ADDR / z) = (real_addr(EA) / z) then
 173                 undefined_case <- 1
 174             else
 175                 undefined_case <- 0
 176                 store_performed <- 0b0
 177     else
 178         undefined_case <- 0
 179         store_performed <- 0b0
 180     if undefined_case then
 181         u1 <- undefined(0b1)
 182         if u1 then
 183             MEM(EA, 2) <- (RS)[48:63]
 184         u2 <- undefined(0b1)
 185         CR0 <- 0b00 || u2 || XER[SO]
 186     else
 187         CR0 <- 0b00 || store_performed || XER[SO]
 188     RESERVE <- 0
 189
 190 Special Registers Altered:
 191
 192     CR0
 193
 194 # Store word Conditional Indexed
 195
 196 X-Form
 197
 198 * stwcx. RS,RA,RB
 199
 200 Pseudo-code:
 201
 202     EA <- (RA|0) + (RB)
 203     undefined_case <- 0
 204     store_performed <- 0b0
 205     if RESERVE then
 206         if ((RESERVE_LENGTH = 4) &
 207            (RESERVE_ADDR = real_addr(EA))) then
 208             MEM(EA, 4) <- (RS)[32:63]
 209             undefined_case <- 0
 210             store_performed <- 0b1
 211         else
 212             # set z to smallest real page size supported by implementation
 213             z <- REAL_PAGE_SIZE
 214             if (RESERVE_ADDR / z) = (real_addr(EA) / z) then
 215                 undefined_case <- 1
 216             else
 217                 undefined_case <- 0
 218                 store_performed <- 0b0
 219     else
 220         undefined_case <- 0
 221         store_performed <- 0b0
 222     if undefined_case then
 223         u1 <- undefined(0b1)
 224         if u1 then
 225             MEM(EA, 4) <- (RS)[32:63]
 226         u2 <- undefined(0b1)
 227         CR0 <- 0b00 || u2 || XER[SO]
 228     else
 229         CR0 <- 0b00 || store_performed || XER[SO]
 230     RESERVE <- 0
 231
 232 Special Registers Altered:
 233
 234     CR0
 235
 236 # Store Doubleword Conditional Indexed
 237
 238 X-Form
 239
 240 * stdcx. RS,RA,RB
 241
 242 Pseudo-code:
 243
 244     EA <- (RA|0) + (RB)
 245     undefined_case <- 0
 246     store_performed <- 0b0
 247     if RESERVE then
 248         if ((RESERVE_LENGTH = 8) &
 249            (RESERVE_ADDR = real_addr(EA))) then
 250             MEM(EA, 8) <- (RS)
 251             undefined_case <- 0
 252             store_performed <- 0b1
 253         else
 254             # set z to smallest real page size supported by implementation
 255             z <- REAL_PAGE_SIZE
 256             if (RESERVE_ADDR / z) = (real_addr(EA) / z) then
 257                 undefined_case <- 1
 258             else
 259                 undefined_case <- 0
 260                 store_performed <- 0b0
 261     else
 262         undefined_case <- 0
 263         store_performed <- 0b0
 264     if undefined_case then
 265         u1 <- undefined(0b1)
 266         if u1 then
 267             MEM(EA, 8) <- (RS)
 268         u2 <- undefined(0b1)
 269         CR0 <- 0b00 || u2 || XER[SO]
 270     else
 271         CR0 <- 0b00 || store_performed || XER[SO]
 272     RESERVE <- 0
 273
 274 Special Registers Altered:
 275
 276     CR0
 277