openpower/isa/fixedsync.mdwn

   1 <!-- X Instructions here described in PowerISA Version 3.0 B Book 1 -->
   2
   3 <!-- Section 4.6 Fixed-point Synchronisation instructions. Pages 865 - 877 -->
   4
   5 # Instruction Synchronise
   6
   7 XL-Form
   8
   9 * isync
  10
  11 Pseudo-code:
  12
  13     # TODO
  14     undefined(0)
  15
  16 Special Registers Altered:
  17
  18     None
  19
  20 # Load Byte And Reserve Indexed
  21
  22 X-Form
  23
  24 * lbarx RT,RA,RB,EH
  25
  26 Pseudo-code:
  27
  28     # TODO
  29     undefined(0)
  30
  31 Special Registers Altered:
  32
  33     None
  34
  35 # Load Halfword And Reserve Indexed
  36
  37 X-Form
  38
  39 * lharx RT,RA,RB,EH
  40
  41 Pseudo-code:
  42
  43     # TODO
  44     undefined(0)
  45
  46 Special Registers Altered:
  47
  48     None
  49
  50 # Load Word And Reserve Indexed
  51
  52 X-Form
  53
  54 * lwarx RT,RA,RB,EH
  55
  56 Pseudo-code:
  57
  58     EA <- (RA|0) + (RB)
  59     RESERVE <- 1
  60     RESERVE_LENGTH <- 4
  61     RESERVE_ADDR <- real_addr(EA)
  62     RT <- [0]*32 || MEM(EA, 4)
  63
  64 Special Registers Altered:
  65
  66     None
  67
  68 # Load Doubleword And Reserve Indexed
  69
  70 X-Form
  71
  72 * ldarx RT,RA,RB,EH
  73
  74 Pseudo-code:
  75
  76     # TODO
  77     undefined(0)
  78
  79 Special Registers Altered:
  80
  81     None
  82
  83 # Store Byte Conditional Indexed
  84
  85 X-Form
  86
  87 * stbcx. RS,RA,RB
  88
  89 Pseudo-code:
  90
  91     # TODO
  92     undefined(0)
  93
  94 Special Registers Altered:
  95
  96     CR0
  97
  98 # Store Halfword Conditional Indexed
  99
 100 X-Form
 101
 102 * sthcx. RS,RA,RB
 103
 104 Pseudo-code:
 105
 106     # TODO
 107     undefined(0)
 108
 109 Special Registers Altered:
 110
 111     CR0
 112
 113 # Store word Conditional Indexed
 114
 115 X-Form
 116
 117 * stwcx. RS,RA,RB
 118
 119 Pseudo-code:
 120
 121     EA <- (RA|0) + (RB)
 122     undefined_case <- 0
 123     store_performed <- 0
 124     if RESERVE then
 125       if (RESERVE_LENGTH = 4 &
 126          RESERVE_ADDR = real_addr(EA)) then
 127            MEM(EA, 1) <- (RS)[32:63]
 128            undefined_case <- 0
 129            store_performed <- 1
 130       else
 131            z <- REAL_PAGE_SIZE # smallest implementation's real page size
 132            if RESERVE_ADDR / z = real_addr(EA) / z then
 133               undefined_case <- 1
 134            else
 135              undefined_case <- 0
 136              store_performed <- 0
 137     else
 138       undefined_case <- 0
 139       store_performed <- 0
 140     if undefined_case then
 141       u1 <- undefined(0b1)
 142       if u1 then
 143          MEM(EA, 1) <- (RS)[32:63]
 144       u2 <- undefined(0b0)
 145       CR0 <- 0b00 || u2 || XER[SO]
 146     else
 147       CR0 <- 0b00 || store_performed || XER[SO]
 148     RESERVE <- 0
 149
 150
 151 Special Registers Altered:
 152
 153     CR0
 154
 155 # Store Doubleword Conditional Indexed
 156
 157 X-Form
 158
 159 * stdcx. RS,RA,RB
 160
 161 Pseudo-code:
 162
 163     # TODO
 164     undefined(0)
 165
 166 Special Registers Altered:
 167
 168     CR0
 169