1 <!-- X Instructions here described in PowerISA Version 3.0 B Book 1 -->
3 <!-- Section 4.6 Fixed-point Synchronisation instructions. Pages 865 - 877 -->
5 # Instruction Synchronise
16 Special Registers Altered:
31 Special Registers Altered:
35 # Load Byte And Reserve Indexed
46 RESERVE_ADDR <- real_addr(EA)
47 RT <- [0]*56 || MEM(EA, 1)
49 Special Registers Altered:
53 # Load Halfword And Reserve Indexed
64 RESERVE_ADDR <- real_addr(EA)
65 RT <- [0]*48 || MEM(EA, 2)
67 Special Registers Altered:
71 # Load Word And Reserve Indexed
82 RESERVE_ADDR <- real_addr(EA)
83 RT <- [0]*32 || MEM(EA, 4)
85 Special Registers Altered:
89 # Load Doubleword And Reserve Indexed
100 RESERVE_ADDR <- real_addr(EA)
103 Special Registers Altered:
107 # Load Quadword And Reserve Indexed
118 RESERVE_ADDR <- real_addr(EA)
121 Special Registers Altered:
125 # Store Byte Conditional Indexed
135 store_performed <- 0b0
137 if ((RESERVE_LENGTH = 1) &
138 (RESERVE_ADDR = real_addr(EA))) then
139 MEM(EA, 1) <- (RS)[56:63]
141 store_performed <- 0b1
143 # set z to smallest real page size supported by implementation
145 if (RESERVE_ADDR / z) = (real_addr(EA) / z) then
149 store_performed <- 0b0
152 store_performed <- 0b0
153 if undefined_case then
156 MEM(EA, 1) <- (RS)[56:63]
158 CR0 <- 0b00 || u2 || XER[SO]
160 CR0 <- 0b00 || store_performed || XER[SO]
163 Special Registers Altered:
167 # Store Halfword Conditional Indexed
177 store_performed <- 0b0
179 if ((RESERVE_LENGTH = 2) &
180 (RESERVE_ADDR = real_addr(EA))) then
181 MEM(EA, 2) <- (RS)[48:63]
183 store_performed <- 0b1
185 # set z to smallest real page size supported by implementation
187 if (RESERVE_ADDR / z) = (real_addr(EA) / z) then
191 store_performed <- 0b0
194 store_performed <- 0b0
195 if undefined_case then
198 MEM(EA, 2) <- (RS)[48:63]
200 CR0 <- 0b00 || u2 || XER[SO]
202 CR0 <- 0b00 || store_performed || XER[SO]
205 Special Registers Altered:
209 # Store word Conditional Indexed
219 store_performed <- 0b0
221 if ((RESERVE_LENGTH = 4) &
222 (RESERVE_ADDR = real_addr(EA))) then
223 MEM(EA, 4) <- (RS)[32:63]
225 store_performed <- 0b1
227 # set z to smallest real page size supported by implementation
229 if (RESERVE_ADDR / z) = (real_addr(EA) / z) then
233 store_performed <- 0b0
236 store_performed <- 0b0
237 if undefined_case then
240 MEM(EA, 4) <- (RS)[32:63]
242 CR0 <- 0b00 || u2 || XER[SO]
244 CR0 <- 0b00 || store_performed || XER[SO]
247 Special Registers Altered:
251 # Store Doubleword Conditional Indexed
261 store_performed <- 0b0
263 if ((RESERVE_LENGTH = 8) &
264 (RESERVE_ADDR = real_addr(EA))) then
267 store_performed <- 0b1
269 # set z to smallest real page size supported by implementation
271 if (RESERVE_ADDR / z) = (real_addr(EA) / z) then
275 store_performed <- 0b0
278 store_performed <- 0b0
279 if undefined_case then
284 CR0 <- 0b00 || u2 || XER[SO]
286 CR0 <- 0b00 || store_performed || XER[SO]
289 Special Registers Altered:
293 # Store Quadword Conditional Indexed
303 store_performed <- 0b0
305 if ((RESERVE_LENGTH = 16) &
306 (RESERVE_ADDR = real_addr(EA))) then
309 store_performed <- 0b1
311 # set z to smallest real page size supported by implementation
313 if (RESERVE_ADDR / z) = (real_addr(EA) / z) then
317 store_performed <- 0b0
320 store_performed <- 0b0
321 if undefined_case then
326 CR0 <- 0b00 || u2 || XER[SO]
328 CR0 <- 0b00 || store_performed || XER[SO]
331 Special Registers Altered: