openpower/isa/fparith.mdwn

   1 <!-- X Instructions here described in PowerISA Version 3.0 B Book 1 -->
   2
   3 <!-- Section 4.6.6.1 Floating-point Elementary Arithmetic p 152-156 -->
   4
   5 # Floating Add [Single]
   6
   7 A-Form
   8
   9 * fadds FRT,FRA,FRB (Rc=0)
  10 * fadds. FRT,FRA,FRB (Rc=1)
  11
  12 Pseudo-code:
  13
  14     FRT <- FPADD32(FRA, FRB)
  15
  16 Special Registers Altered:
  17
  18     FPRF FR FI
  19     FX OX UX XX
  20     VXSNAN VXISI
  21     CR1          (if Rc=1)
  22
  23 # Floating Add [Double]
  24
  25 A-Form
  26
  27 * fadd FRT,FRA,FRB (Rc=0)
  28 * fadd. FRT,FRA,FRB (Rc=1)
  29
  30 Pseudo-code:
  31
  32     FRT <- FPADD64(FRA, FRB)
  33
  34 Special Registers Altered:
  35
  36     FPRF FR FI
  37     FX OX UX XX
  38     VXSNAN VXISI
  39     CR1          (if Rc=1)
  40
  41 # Floating Subtract [Single]
  42
  43 A-Form
  44
  45 * fsubs FRT,FRA,FRB (Rc=0)
  46 * fsubs. FRT,FRA,FRB (Rc=1)
  47
  48 Pseudo-code:
  49
  50     FRT <- FPSUB32(FRA, FRB)
  51
  52 Special Registers Altered:
  53
  54     FPRF FR FI
  55     FX OX UX XX
  56     VXSNAN VXISI
  57     CR1          (if Rc=1)
  58
  59 # Floating Subtract [Double]
  60
  61 A-Form
  62
  63 * fsub FRT,FRA,FRB (Rc=0)
  64 * fsub. FRT,FRA,FRB (Rc=1)
  65
  66 Pseudo-code:
  67
  68     FRT <- FPSUB64(FRA, FRB)
  69
  70 Special Registers Altered:
  71
  72     FPRF FR FI
  73     FX OX UX XX
  74     VXSNAN VXISI
  75     CR1          (if Rc=1)
  76
  77 # Floating Multiply [Single]
  78
  79 A-Form
  80
  81 * fmuls FRT,FRA,FRC (Rc=0)
  82 * fmuls. FRT,FRA,FRC (Rc=1)
  83
  84 Pseudo-code:
  85
  86     FRT <- FPMUL32(FRA, FRC)
  87
  88 Special Registers Altered:
  89
  90     FPRF FR FI
  91     FX OX UX XX
  92     VXSNAN VXISI
  93     CR1          (if Rc=1)
  94
  95 # Floating Multiply [Double]
  96
  97 A-Form
  98
  99 * fmul FRT,FRA,FRC (Rc=0)
 100 * fmul. FRT,FRA,FRC (Rc=1)
 101
 102 Pseudo-code:
 103
 104     FRT <- FPMUL64(FRA, FRC)
 105
 106 Special Registers Altered:
 107
 108     FPRF FR FI
 109     FX OX UX XX
 110     VXSNAN VXISI
 111     CR1          (if Rc=1)
 112
 113 # Floating Divide [Single]
 114
 115 A-Form
 116
 117 * fdivs FRT,FRA,FRB (Rc=0)
 118 * fdivs. FRT,FRA,FRB (Rc=1)
 119
 120 Pseudo-code:
 121
 122     FRT <- FPDIV32(FRA, FRB)
 123
 124 Special Registers Altered:
 125
 126     FPRF FR FI
 127     FX OX UX XX
 128     VXSNAN VXISI
 129     CR1          (if Rc=1)
 130
 131 # Floating Divide [Double]
 132
 133 A-Form
 134
 135 * fdiv FRT,FRA,FRB (Rc=0)
 136 * fdiv. FRT,FRA,FRB (Rc=1)
 137
 138 Pseudo-code:
 139
 140     FRT <- FPDIV64(FRA, FRB)
 141
 142 Special Registers Altered:
 143
 144     FPRF FR FI
 145     FX OX UX XX
 146     VXSNAN VXISI
 147     CR1          (if Rc=1)
 148
 149 # Floating Multiply-Add [Single]
 150
 151 A-Form
 152
 153 * fmadds FRT,FRA,FRC,FRB (Rc=0)
 154 * fmadds. FRT,FRA,FRC,FRB (Rc=1)
 155
 156 Pseudo-code:
 157
 158     FRT <- FPMULADD32(FRA, FRC, FRB, 1, 1)
 159
 160 Special Registers Altered:
 161
 162     FPRF FR FI
 163     FX OX UX XX
 164     VXSNAN VXISI VXIMZ
 165     CR1          (if Rc=1)
 166
 167 # Floating Multiply-Sub [Single]
 168
 169 A-Form
 170
 171 * fmsubs FRT,FRA,FRC,FRB (Rc=0)
 172 * fmsubs. FRT,FRA,FRC,FRB (Rc=1)
 173
 174 Pseudo-code:
 175
 176     FRT <- FPMULADD32(FRA, FRC, FRB, 1, -1)
 177
 178 Special Registers Altered:
 179
 180     FPRF FR FI
 181     FX OX UX XX
 182     VXSNAN VXISI VXIMZ
 183     CR1          (if Rc=1)
 184
 185 # Floating Negative Multiply-Add [Single]
 186
 187 A-Form
 188
 189 * fnmadds FRT,FRA,FRC,FRB (Rc=0)
 190 * fnmadds. FRT,FRA,FRC,FRB (Rc=1)
 191
 192 Pseudo-code:
 193
 194     FRT <- FPMULADD32(FRA, FRC, FRB, -1, -1)
 195
 196 Special Registers Altered:
 197
 198     FPRF FR FI
 199     FX OX UX XX
 200     VXSNAN VXISI VXIMZ
 201     CR1          (if Rc=1)
 202
 203 # Floating Negative Multiply-Sub [Single]
 204
 205 A-Form
 206
 207 * fnmsubs FRT,FRA,FRC,FRB (Rc=0)
 208 * fnmsubs. FRT,FRA,FRC,FRB (Rc=1)
 209
 210 Pseudo-code:
 211
 212     FRT <- FPMULADD32(FRA, FRC, FRB, -1, 1)
 213
 214 Special Registers Altered:
 215
 216     FPRF FR FI
 217     FX OX UX XX
 218     VXSNAN VXISI VXIMZ
 219     CR1          (if Rc=1)
 220