1 <!-- X Instructions here described in PowerISA Version 3.0 B Book 1 -->
3 <!-- Section 4.6.6.1 Floating-point Elementary Arithmetic p 152-156 -->
5 # Floating Add [Single]
9 * fadds FRT,FRA,FRB (Rc=0)
10 * fadds. FRT,FRA,FRB (Rc=1)
14 FRT <- FPADD32(FRA, FRB)
16 Special Registers Altered:
23 # Floating Add [Double]
27 * fadd FRT,FRA,FRB (Rc=0)
28 * fadd. FRT,FRA,FRB (Rc=1)
32 FRT <- FPADD64(FRA, FRB)
34 Special Registers Altered:
41 # Floating Subtract [Single]
45 * fsubs FRT,FRA,FRB (Rc=0)
46 * fsubs. FRT,FRA,FRB (Rc=1)
50 FRT <- FPSUB32(FRA, FRB)
52 Special Registers Altered:
59 # Floating Subtract [Double]
63 * fsub FRT,FRA,FRB (Rc=0)
64 * fsub. FRT,FRA,FRB (Rc=1)
68 FRT <- FPSUB64(FRA, FRB)
70 Special Registers Altered:
77 # Floating Multiply [Single]
81 * fmuls FRT,FRA,FRC (Rc=0)
82 * fmuls. FRT,FRA,FRC (Rc=1)
86 FRT <- FPMUL32(FRA, FRC)
88 Special Registers Altered:
95 # Floating Multiply [Double]
99 * fmul FRT,FRA,FRC (Rc=0)
100 * fmul. FRT,FRA,FRC (Rc=1)
104 FRT <- FPMUL64(FRA, FRC)
106 Special Registers Altered:
113 # Floating Divide [Single]
117 * fdivs FRT,FRA,FRB (Rc=0)
118 * fdivs. FRT,FRA,FRB (Rc=1)
122 FRT <- FPDIV32(FRA, FRB)
124 Special Registers Altered:
131 # Floating Divide [Double]
135 * fdiv FRT,FRA,FRB (Rc=0)
136 * fdiv. FRT,FRA,FRB (Rc=1)
140 FRT <- FPDIV64(FRA, FRB)
142 Special Registers Altered:
149 # Floating Multiply-Add [Single]
153 * fmadds FRT,FRA,FRC,FRB (Rc=0)
154 * fmadds. FRT,FRA,FRC,FRB (Rc=1)
158 FRT <- FPMULADD32(FRA, FRC, FRB, 1, 1)
160 Special Registers Altered:
167 # Floating Multiply-Sub [Single]
171 * fmsubs FRT,FRA,FRC,FRB (Rc=0)
172 * fmsubs. FRT,FRA,FRC,FRB (Rc=1)
176 FRT <- FPMULADD32(FRA, FRC, FRB, 1, -1)
178 Special Registers Altered:
185 # Floating Negative Multiply-Add [Single]
189 * fnmadds FRT,FRA,FRC,FRB (Rc=0)
190 * fnmadds. FRT,FRA,FRC,FRB (Rc=1)
194 FRT <- FPMULADD32(FRA, FRC, FRB, -1, -1)
196 Special Registers Altered:
203 # Floating Negative Multiply-Sub [Single]
207 * fnmsubs FRT,FRA,FRC,FRB (Rc=0)
208 * fnmsubs. FRT,FRA,FRC,FRB (Rc=1)
212 FRT <- FPMULADD32(FRA, FRC, FRB, -1, 1)
214 Special Registers Altered: