convert test_caller_svp64.py to new vector numbering convention
[openpower-isa.git] / openpower / isa / fpload.mdwn
1 <!-- X Instructions here described in PowerISA Version 3.0 B Book 1 -->
2
3 <!-- Section 4.6.1 Floating-point storage access instructions. P 140 - 143 -->
4
5 # Load Floating-Point Single
6
7 D-Form
8
9 * lfs FRT,D(RA)
10
11 Pseudo-code:
12
13 EA <- (RA|0) + EXTS(D)
14 FRT <- DOUBLE(MEM(EA, 4))
15
16 Special Registers Altered:
17
18 None
19
20 # Load Floating-Point Single Indexed
21
22 X-Form
23
24 * lfsx FRT,RA,RB
25
26 Pseudo-code:
27
28 EA <- (RA|0) + (RB)
29 FRT <- DOUBLE(MEM(EA, 4))
30
31 Special Registers Altered:
32
33 None
34
35 # Load Floating-Point Single with Update
36
37 D-Form
38
39 * lfsu FRT,D(RA)
40
41 Pseudo-code:
42
43 EA <- (RA) + EXTS(D)
44 FRT <- DOUBLE(MEM(EA, 4))
45 RA <- EA
46
47 Special Registers Altered:
48
49 None
50
51 # Load Floating-Point Single with Update Indexed
52
53 X-Form
54
55 * lfsux FRT,RA,RB
56
57 Pseudo-code:
58
59 EA <- (RA) + (RB)
60 FRT <- DOUBLE(MEM(EA, 4))
61 RA <- EA
62
63 Special Registers Altered:
64
65 None
66
67 # Load Floating-Point Double
68
69 D-Form
70
71 * lfd FRT,D(RA)
72
73 Pseudo-code:
74
75 EA <- (RA|0) + EXTS(D)
76 FRT <- MEM(EA, 8)
77
78 Special Registers Altered:
79
80 None
81
82 # Load Floating-Point Double Indexed
83
84 X-Form
85
86 * lfdx FRT,RA,RB
87
88 Pseudo-code:
89
90 EA <- (RA|0) + (RB)
91 FRT <- MEM(EA, 8)
92
93 Special Registers Altered:
94
95 None
96
97 # Load Floating-Point Double with Update
98
99 D-Form
100
101 * lfdu FRT,D(RA)
102
103 Pseudo-code:
104
105 EA <- (RA) + EXTS(D)
106 FRT <- MEM(EA, 8)
107 RA <- EA
108
109 Special Registers Altered:
110
111 None
112
113 # Load Floating-Point Double with Update Indexed
114
115 X-Form
116
117 * lfdux FRT,RA,RB
118
119 Pseudo-code:
120
121 EA <- (RA) + (RB)
122 FRT <- MEM(EA, 8)
123 RA <- EA
124
125 Special Registers Altered:
126
127 None
128
129 # Load Floating-Point as Integer Word Algebraic Indexed
130
131 X-Form
132
133 * lfiwax FRT,RA,RB
134
135 Pseudo-code:
136
137 EA <- (RA|0) + (RB)
138 FRT <- EXTS(MEM(EA, 4))
139
140 Special Registers Altered:
141
142 None
143
144 # Load Floating-Point as Integer Word Zero Indexed
145
146 X-Form
147
148 * lfiwix FRT,RA,RB
149
150 Pseudo-code:
151
152 EA <- (RA|0) + (RB)
153 FRT <- [0]*32 || MEM(EA, 4)
154
155 Special Registers Altered:
156
157 None