openpower/isa/fpstore.mdwn

   1 <!-- X Instructions here described in PowerISA Version 3.0 B Book 1 -->
   2
   3 <!-- Section 4.6.3 Floating-point store instructions. P 144 - 147 -->
   4
   5 # Store Floating-Point Single
   6
   7 D-Form
   8
   9 * stfs FRS,D(RA)
  10
  11 Pseudo-code:
  12
  13     EA <- (RA|0) + EXTS(D)
  14     MEM(EA, 4)<- SINGLE( (FRS) )
  15
  16 Special Registers Altered:
  17
  18     None
  19
  20 # Store Floating-Point Single Indexed
  21
  22 X-Form
  23
  24 * stfsx FRS,RA,RB
  25
  26 Pseudo-code:
  27
  28     EA <- (RA|0) + (RB)
  29     MEM(EA, 4)<- SINGLE( (FRS) )
  30
  31 Special Registers Altered:
  32
  33     None
  34
  35 # Store Floating-Point Single with Update
  36
  37 D-Form
  38
  39 * stfsu FRS,D(RA)
  40
  41 Pseudo-code:
  42
  43     EA <- (RA) + EXTS(D)
  44     MEM(EA, 4)<- SINGLE( (FRS) )
  45     RA <- EA
  46
  47 Special Registers Altered:
  48
  49     None
  50
  51 # Store Floating-Point Single with Update Indexed
  52
  53 X-Form
  54
  55 * stfsux FRS,RA,RB
  56
  57 Pseudo-code:
  58
  59     EA <- (RA) + (RB)
  60     MEM(EA, 4)<- SINGLE( (FRS) )
  61     RA <- EA
  62
  63 Special Registers Altered:
  64
  65     None
  66
  67 # Store Floating-Point Double
  68
  69 D-Form
  70
  71 * stfd FRS,D(RA)
  72
  73 Pseudo-code:
  74
  75     EA <- (RA|0) + EXTS(D)
  76     MEM(EA, 8)<- (FRS)
  77
  78 Special Registers Altered:
  79
  80     None
  81
  82 # Store Floating-Point Double Indexed
  83
  84 X-Form
  85
  86 * stfdx FRS,RA,RB
  87
  88 Pseudo-code:
  89
  90     EA <- (RA|0) + (RB)
  91     MEM(EA, 8)<- (FRS)
  92
  93 Special Registers Altered:
  94
  95     None
  96
  97 # Store Floating-Point Double with Update
  98
  99 D-Form
 100
 101 * stfdu FRS,D(RA)
 102
 103 Pseudo-code:
 104
 105     EA <- (RA) + EXTS(D)
 106     MEM(EA, 8)<- (FRS)
 107     RA <- EA
 108
 109 Special Registers Altered:
 110
 111     None
 112
 113 # Store Floating-Point Double with Update Indexed
 114
 115 X-Form
 116
 117 * stfdux FRS,RA,RB
 118
 119 Pseudo-code:
 120
 121     EA <- (RA) + (RB)
 122     MEM(EA, 8)<- (FRS)
 123     RA <- EA
 124
 125 Special Registers Altered:
 126
 127     None
 128
 129 # Store Floating-Point as Integer Word Indexed
 130
 131 X-Form
 132
 133 * stfiwx FRS,RA,RB
 134
 135 Pseudo-code:
 136
 137     b <- (RA|0)
 138     EA <- b + (RB)
 139     MEM(EA, 8)<- (FRS)[32:63]
 140
 141 Special Registers Altered:
 142
 143     None