1 <!-- This defines DRAFT instructions described in SV -->
3 <!-- This defines instructions that store from a register to RAM -->
4 <!-- Effective Address is always RA, and the usual EA is stored late in RA -->
6 # Store Byte with Update
16 MEM(ea, 1) <- (RS)[XLEN-8:XLEN-1]
19 Special Registers Altered:
23 # Store Byte with Update Indexed
33 MEM(ea, 1) <- (RS)[XLEN-8:XLEN-1]
36 Special Registers Altered:
40 # Store Halfword with Update
50 MEM(ea, 2) <- (RS)[XLEN-16:XLEN-1]
53 Special Registers Altered:
57 # Store Halfword with Update Indexed
67 MEM(ea, 2) <- (RS)[XLEN-16:XLEN-1]
70 Special Registers Altered:
74 # Store Word with Update
84 MEM(ea, 4) <- (RS)[XLEN-32:XLEN-1]
87 Special Registers Altered:
91 # Store Word with Update Indexed
101 MEM(ea, 4) <- (RS)[XLEN-32:XLEN-1]
104 Special Registers Altered:
108 # Store Doubleword with Update
116 EA <- (RA) + EXTS(DS || 0b00)
121 Special Registers Altered:
125 # Store Doubleword with Update Indexed
138 Special Registers Altered: