1 <!-- This defines DRAFT instructions described in SV -->
3 <!-- This defines instructions that store from a register to RAM -->
4 <!-- Effective Address is always RA, and the usual EA is stored late in RA -->
6 # Store Byte with Post-Update
16 MEM(ea, 1) <- (RS)[XLEN-8:XLEN-1]
21 Let the effective address (EA) be the sum (RA)+ D.
23 (RS)[56:63] are stored into the byte in storage addressed
26 EA is placed into register RA.
28 If RA=0, the instruction form is invalid.
30 Special Registers Altered:
34 # Store Byte with Post-Update Indexed
44 MEM(ea, 1) <- (RS)[XLEN-8:XLEN-1]
49 Let the effective address (EA) be the sum (RA)+ (RB).
51 (RS)[56:63] are stored into the byte in storage addressed
54 EA is placed into register RA.
56 If RA=0, the instruction form is invalid.
58 Special Registers Altered:
62 # Store Halfword with Post-Update
72 MEM(ea, 2) <- (RS)[XLEN-16:XLEN-1]
77 Let the effective address (EA) be the sum (RA|0)+ D.
79 (RS)[48:63] are stored into the halfword in storage
82 Special Registers Altered:
86 # Store Halfword with Post-Update Indexed
96 MEM(ea, 2) <- (RS)[XLEN-16:XLEN-1]
101 Let the effective address (EA) be the sum (RA)+ (RB).
103 (RS)[56:63] are stored into the byte in storage addressed
106 EA is placed into register RA.
108 If RA=0, the instruction form is invalid
110 Special Registers Altered:
114 # Store Word with Post-Update
124 MEM(ea, 4) <- (RS)[XLEN-32:XLEN-1]
129 Let the effective address (EA) be the sum (RA)+ D.
131 (RS)[32:63] are stored into the word in storage addressed
134 EA is placed into register RA.
136 If RA=0, the instruction form is invalid.
138 Special Registers Altered:
142 # Store Word with Post-Update Indexed
152 MEM(ea, 4) <- (RS)[XLEN-32:XLEN-1]
157 Let the effective address (EA) be the sum (RA)+ (RB).
159 (RS)[32:63] are stored into the word in storage addressed
162 EA is placed into register RA.
164 If RA=0, the instruction form is invalid.
166 Special Registers Altered:
170 # Store Doubleword with Post-Update
178 EA <- (RA) + EXTS(DS || 0b00)
185 Let the effective address (EA) be the sum.
187 (RA)+ (DS||0b00). (RS) is stored into the doubleword in
188 storage addressed by RA.
190 EA is placed into register RA.
192 If RA=0, the instruction form is invalid.
194 Special Registers Altered:
198 # Store Doubleword with Post-Update Indexed
213 Let the effective address (EA) be the sum (RA)+ (RB).
215 (RS) is stored into the doubleword in storage
218 EA is placed into register RA.
220 If RA=0, the instruction form is invalid.
222 Special Registers Altered: