openpower/isa/pifpload.mdwn

   1 <!-- X Instructions here described in PowerISA Version 3.0 B Book 1 -->
   2
   3 <!-- Section 4.6.1 Floating-point storage access instructions. P 140 - 143 -->
   4
   5 # Load Floating-Point Single with Post-Update
   6
   7 D-Form
   8
   9 * lfsup FRT,D(RA)
  10
  11 Pseudo-code:
  12
  13     EA <- (RA) + EXTS(D)
  14     FRT <- DOUBLE(MEM(RA, 4))
  15     RA <- EA
  16
  17 Description:
  18
  19     Let the effective address (EA) be the sum (RA)+D.
  20
  21     The word in storage addressed by EA is interpreted as
  22     a floating-point single-precision operand. This word is
  23     converted to floating-point double format (see
  24     page 138) and placed into register FRT.
  25
  26     EA is placed into register RA.
  27
  28     If RA=0, the instruction form is invalid.
  29
  30 Special Registers Altered:
  31
  32     None
  33
  34 # Load Floating-Point Single with Post-Update Indexed
  35
  36 X-Form
  37
  38 * lfsupx FRT,RA,RB
  39
  40 Pseudo-code:
  41
  42     EA <- (RA) + (RB)
  43     FRT <- DOUBLE(MEM(RA, 4))
  44     RA <- EA
  45
  46 Description:
  47
  48     Let the effective address (EA) be the sum (RA)+(RB).
  49
  50     The word in storage addressed by EA is interpreted as
  51     a floating-point single-precision operand. This word is
  52     converted to floating-point double format (see
  53     page 138) and placed into register FRT.
  54
  55     EA is placed into register RA.
  56
  57     If RA=0, the instruction form is invalid.
  58
  59 Special Registers Altered:
  60
  61     None
  62
  63 # Load Floating-Point Double with Post-Update
  64
  65 D-Form
  66
  67 * lfdup FRT,D(RA)
  68
  69 Pseudo-code:
  70
  71     EA <- (RA) + EXTS(D)
  72     FRT <- MEM(RA, 8)
  73     RA <- EA
  74
  75 Description:
  76
  77     Let the effective address (EA) be the sum (RA)+D.
  78
  79     The doubleword in storage addressed by EA is loaded
  80     into register FRT.
  81
  82     EA is placed into register RA.
  83
  84     If RA=0, the instruction form is invalid.
  85
  86 Special Registers Altered:
  87
  88     None
  89
  90 # Load Floating-Point Double with Post-Update Indexed
  91
  92 X-Form
  93
  94 * lfdupx FRT,RA,RB
  95
  96 Pseudo-code:
  97
  98     EA <- (RA) + (RB)
  99     FRT <- MEM(RA, 8)
 100     RA <- EA
 101
 102 Description:
 103
 104     Let the effective address (EA) be the sum (RA)+(RB).
 105
 106     The doubleword in storage addressed by EA is loaded
 107     into register FRT.
 108
 109     EA is placed into register RA.
 110
 111     If RA=0, the instruction form is invalid.
 112
 113 Special Registers Altered:
 114
 115     None
 116