openpower/isa/pifpstore.mdwn

   1 <!-- X Instructions here described in PowerISA Version 3.0 B Book 1 -->
   2
   3 <!-- Section 4.6.3 Floating-point store instructions. P 144 - 147 -->
   4
   5 # Store Floating-Point Single with Update
   6
   7 D-Form
   8
   9 * stfsup FRS,D(RA)
  10
  11 Pseudo-code:
  12
  13     EA <- (RA) + EXTS(D)
  14     MEM(RA, 4)<- SINGLE( (FRS) )
  15     RA <- EA
  16
  17 Description:
  18
  19     Let the effective address (EA) be the sum (RA) +D.
  20
  21     The contents of register FRS are converted to single
  22     format (see page 142) and stored into the word in stor-
  23     age addressed by RA.
  24
  25     EA is placed into register RA.
  26
  27     If RA=0, the instruction form is invalid.
  28
  29 Special Registers Altered:
  30
  31     None
  32
  33 # Store Floating-Point Single with Update Indexed
  34
  35 X-Form
  36
  37 * stfsupx FRS,RA,RB
  38
  39 Pseudo-code:
  40
  41     EA <- (RA) + (RB)
  42     MEM(RA, 4)<- SINGLE( (FRS) )
  43     RA <- EA
  44
  45 Description:
  46
  47     Let the effective address (EA) be the sum (RA) +(RB).
  48
  49     The contents of register FRS are converted to single
  50     format (see page 142) and stored into the word in stor-
  51     age addressed by RA.
  52
  53     EA is placed into register RA.
  54
  55     If RA=0, the instruction form is invalid.
  56
  57 Special Registers Altered:
  58
  59     None
  60
  61 # Store Floating-Point Double with Update
  62
  63 D-Form
  64
  65 * stfdup FRS,D(RA)
  66
  67 Pseudo-code:
  68
  69     EA <- (RA) + EXTS(D)
  70     MEM(RA, 8)<- (FRS)
  71     RA <- EA
  72
  73 Description:
  74
  75     Let the effective address (EA) be the sum (RA)+D.
  76
  77     The contents of register FRS are stored into the dou-
  78     bleword in storage addressed by RA.
  79
  80     EA is placed into register RA.
  81
  82     If RA=0, the instruction form is invalid.
  83
  84 Special Registers Altered:
  85
  86     None
  87
  88 # Store Floating-Point Double with Update Indexed
  89
  90 X-Form
  91
  92 * stfdupx FRS,RA,RB
  93
  94 Pseudo-code:
  95
  96     EA <- (RA) + (RB)
  97     MEM(RA, 8)<- (FRS)
  98     RA <- EA
  99
 100 Description:
 101
 102     Let the effective address (EA) be the sum (RA)+(RB).
 103
 104     The contents of register FRS are stored into the dou-
 105     bleword in storage addressed by RA.
 106
 107     EA is placed into register RA.
 108
 109     If RA=0, the instruction form is invalid.
 110
 111 Special Registers Altered:
 112
 113     None
 114