openpower/isa/pifpstoreshift.mdwn

   1 <!-- X Instructions here described in PowerISA Version 3.0 B Book 1 -->
   2
   3 <!-- Section 4.6.3 Floating-point store instructions. P 144 - 147 -->
   4
   5 # Store Floating-Point Single with Update Indexed
   6
   7 X-Form
   8
   9 * stfsux FRS,RA,RB
  10
  11 Pseudo-code:
  12
  13     EA <- (RA) + (RB)
  14     MEM(RA, 4)<- SINGLE( (FRS) )
  15     RA <- EA
  16
  17 Description:
  18
  19     Let the effective address (EA) be the sum (RA) +(RB).
  20
  21     The contents of register FRS are converted to single
  22     format (see page 142) and stored into the word in stor-
  23     age addressed by RA.
  24
  25     EA is placed into register RA.
  26
  27     If RA=0, the instruction form is invalid.
  28
  29 Special Registers Altered:
  30
  31     None
  32
  33 # Store Floating-Point Double with Update Indexed
  34
  35 X-Form
  36
  37 * stfdux FRS,RA,RB
  38
  39 Pseudo-code:
  40
  41     EA <- (RA) + (RB)
  42     MEM(RA, 8)<- (FRS)
  43     RA <- EA
  44
  45 Description:
  46
  47     Let the effective address (EA) be the sum (RA)+(RB).
  48
  49     The contents of register FRS are stored into the dou-
  50     bleword in storage addressed by RA.
  51
  52     EA is placed into register RA.
  53
  54     If RA=0, the instruction form is invalid.
  55
  56 Special Registers Altered:
  57
  58     None
  59