openpower/isa/prefix_codes.mdwn

   1 <!-- https://libre-soc.org/openpower/prefix_codes/ -->
   2
   3 # [DRAFT] Prefix-code decode
   4
   5 VA2-Form
   6
   7 * pcdec. RT,RA,RB,RC,once (Rc=1)
   8
   9 Pseudo-code:
  10
  11     tree[0:63] <- (RA)
  12     rb_used <- 0b0
  13     in_bits[0:63] <- (RC|0)
  14     if in_bits = 0 then
  15         in_bits[0:63] <- 1
  16     final_in_bits <- in_bits
  17     final_rb_used <- rb_used
  18     output <- [0] * 64
  19     out_byte <- 0
  20     decoded[0:7] <- 1
  21     so_bit <- 0b0
  22     do while out_byte < 8
  23         in_bit <- in_bits[63]
  24         if in_bits = 1 then
  25             if rb_used | (_RB = 0) then
  26                 leave
  27             rb_used <- 0b1
  28             in_bit <- (RB)[63]
  29             in_bits <- 0b1 || (RB)[0:62]
  30         else
  31             in_bits <- 0b0 || in_bits[0:62]
  32         # walk the binary tree in `tree` from parent to the selected child
  33         decoded <- decoded[1:7] || in_bit
  34         if decoded <u 64 then
  35             if tree[63 - decoded] then
  36                 final_in_bits <- in_bits
  37                 final_rb_used <- rb_used
  38                 output[56 - 8 * out_byte:63 - 8 * out_byte] <- decoded
  39                 decoded[0:7] <- 1
  40                 out_byte <- out_byte + 1
  41                 if once then
  42                     leave
  43         else
  44             so_bit <- 0b1
  45             leave
  46     RT <- output
  47     RS <- final_in_bits
  48     CR0 <- final_rb_used || 0b0 || (output = 0) || so_bit
  49
  50 Special Registers Altered:
  51
  52     CR0