add DCT butterfly mode into svremap
[openpower-isa.git] / openpower / isa / simplev.mdwn
1 <!-- This defines instructions described in PowerISA Version 3.0 B Book 1 -->
2
3 <!-- These are not described in book 1 -->
4
5 # setvl
6
7 SVL-Form
8
9 * setvl RT, RA, SVi, vf, vs, ms
10 * setvl. RT, RA, SVi, vf, vs, ms
11
12 Pseudo-code:
13
14 if (vf & (¬vs) & ¬(ms)) = 1 then
15 SVSTATE_NEXT(SVi)
16 else
17 VLimm <- SVi + 1
18 if vs = 1 then
19 if _RA != 0 then
20 VL <- (RA|0)[57:63]
21 else
22 VL <- VLimm[0:6]
23 else
24 VL <- SVSTATE[7:13]
25 if ms = 1 then
26 MVL <- VLimm[0:6]
27 else
28 MVL <- SVSTATE[0:6]
29 if VL > MVL then
30 VL = MVL
31 SVSTATE[0:6] <- MVL
32 SVSTATE[7:13] <- VL
33 if _RT != 0b00000 then
34 GPR(_RT) <- [0]*57 || VL
35 SVSTATE[63] <- vf
36
37 Special Registers Altered:
38
39 CR0 (if Rc=1)
40
41 # svremap
42
43 SVRM-Form
44
45 * svremap SVme, mi0, mi1, mi2, mo0, mo1, pst
46
47 Pseudo-code:
48
49 # registers RA RB RC RT EA/FRS SVSHAPE0-3 indices
50 SVSTATE[32:33] <- mi0
51 SVSTATE[34:35] <- mi1
52 SVSTATE[36:37] <- mi2
53 SVSTATE[38:39] <- mo0
54 SVSTATE[40:41] <- mo1
55 # enable bit for RA RB RC RT EA/FRS
56 SVSTATE[42:46] <- SVme
57 # persistence bit (applies to more than one instruction)
58 SVSTATE[62] <- pst
59
60 Special Registers Altered:
61
62 None
63
64 # svshape
65
66 SVM-Form
67
68 * svshape SVxd, SVyd, SVzd, SVRM, vf
69
70 Pseudo-code:
71
72 # for convenience, VL to be calculated and stored in SVSTATE
73 vlen <- [0] * 7
74 SVSTATE[0:63] <- [0] * 64
75 # clear out all SVSHAPEs
76 SVSHAPE0[0:31] <- [0] * 32
77 SVSHAPE1[0:31] <- [0] * 32
78 SVSHAPE2[0:31] <- [0] * 32
79 SVSHAPE3[0:31] <- [0] * 32
80 # set schedule up for multiply
81 if (SVRM = 0b0000) then
82 # VL in Matrix Multiply is xd*yd*zd
83 n <- (0b00 || SVxd) * (0b00 || SVyd) * (0b00 || SVzd)
84 vlen[0:6] <- n[14:20]
85 # set up template in SVSHAPE0, then copy to 1-3
86 SVSHAPE0[0:5] <- (0b0 || SVxd) # xdim
87 SVSHAPE0[6:11] <- (0b0 || SVyd) # ydim
88 SVSHAPE0[12:17] <- (0b0 || SVzd) # zdim
89 SVSHAPE0[28:29] <- 0b11 # skip z
90 # copy
91 SVSHAPE1[0:31] <- SVSHAPE0[0:31]
92 SVSHAPE2[0:31] <- SVSHAPE0[0:31]
93 SVSHAPE3[0:31] <- SVSHAPE0[0:31]
94 # set up FRA
95 SVSHAPE1[18:20] <- 0b001 # permute x,z,y
96 SVSHAPE1[28:29] <- 0b01 # skip z
97 # FRC
98 SVSHAPE2[18:20] <- 0b001 # permute x,z,y
99 SVSHAPE2[28:29] <- 0b11 # skip y
100 # set schedule up for FFT butterfly
101 if (SVRM = 0b0001) then
102 # calculate O(N log2 N)
103 n <- [0] * 3
104 do while n < 5
105 if SVxd[4-n] = 0 then
106 leave
107 n <- n + 1
108 n <- ((0b0 || SVxd) + 1) * n
109 vlen[0:6] <- n[1:7]
110 # set up template in SVSHAPE0, then copy to 1-3
111 # for FRA and FRT
112 SVSHAPE0[0:5] <- (0b0 || SVxd) # xdim
113 SVSHAPE0[30:31] <- 0b01 # Butterfly mode
114 # copy
115 SVSHAPE1[0:31] <- SVSHAPE0[0:31]
116 SVSHAPE2[0:31] <- SVSHAPE0[0:31]
117 # set up FRB and FRS
118 SVSHAPE1[28:29] <- 0b01 # j+halfstep schedule
119 # FRC (coefficients)
120 SVSHAPE2[28:29] <- 0b10 # k schedule
121 # set schedule up for DCT Inner butterfly
122 if (SVRM = 0b0010) then
123 # calculate O(N log2 N)
124 n <- [0] * 3
125 do while n < 5
126 if SVxd[4-n] = 0 then
127 leave
128 n <- n + 1
129 n <- ((0b0 || SVxd) + 1) * n
130 vlen[0:6] <- n[1:7]
131 # set up template in SVSHAPE0, then copy to 1-3
132 # for FRA and FRT
133 SVSHAPE0[0:5] <- (0b0 || SVxd) # xdim
134 SVSHAPE0[30:31] <- 0b01 # Butterfly mode
135 SVSHAPE0[18:20] <- 0b001 # DCT Inner Butterfly sub-mode
136 # copy
137 SVSHAPE1[0:31] <- SVSHAPE0[0:31]
138 # set up FRB and FRS
139 SVSHAPE1[28:29] <- 0b01 # j+halfstep schedule
140 # set VL, MVL and Vertical-First
141 SVSTATE[0:6] <- vlen
142 SVSTATE[7:13] <- vlen
143 SVSTATE[63] <- vf
144
145 Special Registers Altered:
146
147 None
148