add svremap manual instruction (Primary Opcode 22, sandbox)
[openpower-isa.git] / openpower / isa / simplev.mdwn
1 <!-- This defines instructions described in PowerISA Version 3.0 B Book 1 -->
2
3 <!-- These are not described in book 1 -->
4
5 # setvl
6
7 SVL-Form
8
9 * setvl RT, RA, SVi, vs, ms
10 * setvl. RT, RA, SVi, vs, ms
11
12 Pseudo-code:
13
14 VLimm <- SVi + 1
15 if vs = 1 then
16 if _RA != 0 then
17 VL <- (RA|0)[57:63]
18 else
19 VL <- VLimm[1:7]
20 else
21 VL <- SVSTATE[7:13]
22 if ms = 1 then
23 MVL <- VLimm[1:7]
24 else
25 MVL <- SVSTATE[0:6]
26 if VL > MVL then
27 VL = MVL
28 SVSTATE[0:6] <- MVL
29 SVSTATE[7:13] <- VL
30 RT <- [0]*57 || VL
31
32 Special Registers Altered:
33
34 CR0 (if Rc=1)
35
36 # svremap
37
38 SVM-Form
39
40 * svremap SVxd, SVyd, SVzd, SVRM
41
42 Pseudo-code:
43
44 # hack: clear out all SVSHAPEs and set them up for multiply
45 SVSHAPE0[0:31] <- [0] * 32
46 SVSHAPE1[0:31] <- [0] * 32
47 SVSHAPE2[0:31] <- [0] * 32
48 SVSHAPE3[0:31] <- [0] * 32
49 # set up template in SVSHAPE0, then copy to 1-3
50 SVSHAPE0[0:5] <- (0b0 || SVxd) # xdim
51 SVSHAPE0[6:11] <- (0b0 || SVyd) # ydim
52 SVSHAPE0[12:17] <- (0b0 || SVzd) # zdim
53 SVSHAPE0[28:29] <- 0b11 # skip z
54 # copy
55 SVSHAPE1[0:31] <- SVSHAPE0[0:31]
56 SVSHAPE2[0:31] <- SVSHAPE0[0:31]
57 SVSHAPE3[0:31] <- SVSHAPE0[0:31]
58 # set up FRA
59 SVSHAPE1[18:20] <- 0b001 # permute x,z,y
60 SVSHAPE1[28:29] <- 0b01 # skip z
61 # FRC
62 SVSHAPE2[18:20] <- 0b001 # permute x,z,y
63 SVSHAPE2[28:29] <- 0b11 # skip y
64
65 Special Registers Altered:
66
67 None
68