1 <!-- This defines Draft SVP64 instructions to augment PowerISA Version 3.0 -->
2 <!-- These are not described in book 1 -->
13 step <- SVSTATE_NEXT(SVi, vf)
16 Special Registers Altered:
24 * setvl RT,RA,SVi,vf,vs,ms
25 * setvl. RT,RA,SVi,vf,vs,ms
29 if (vf & (¬vs) & ¬(ms)) = 1 then
30 step <- SVSTATE_NEXT(SVi, 0b0)
32 GPR(_RT) <- [0]*57 || step
34 if step = 0 then c <- 0b001
36 CR[32:35] <- c || XER[SO]
40 if ms = 1 then MVL <- VLimm[0:6]
41 else MVL <- SVSTATE[0:6]
43 if vs = 0 then VL <- SVSTATE[7:13]
45 if (RA) >u 0b1111111 then VL <- 0b1111111
46 else VL <- (RA)[57:63]
47 else if _RT = 0 then VL <- VLimm[0:6]
48 else if CTR >u 0b1111111 then VL <- 0b1111111
50 # limit VL to within MVL
56 GPR(_RT) <- [0]*57 || VL
57 if ((¬vs) & ¬(ms)) = 0 then
58 # set requested Vertical-First mode, clear persist
62 if VL = 0 then c <- 0b001
64 CR[32:35] <- c || XER[SO]
66 Special Registers Altered:
74 * svremap SVme,mi0,mi1,mi2,mo0,mo1,pst
78 # registers RA RB RC RT EA/FRS SVSHAPE0-3 indices
84 # enable bit for RA RB RC RT EA/FRS
85 SVSTATE[42:46] <- SVme
86 # persistence bit (applies to more than one instruction)
89 Special Registers Altered:
97 * svshape SVxd,SVyd,SVzd,SVrm,vf
101 # for convenience, VL to be calculated and stored in SVSTATE
103 itercount[0:6] <- [0] * 7
104 SVSTATE[0:31] <- [0] * 32
105 # only overwrite REMAP if "persistence" is zero
106 if (SVSTATE[62] = 0b0) then
107 SVSTATE[32:33] <- 0b00
108 SVSTATE[34:35] <- 0b00
109 SVSTATE[36:37] <- 0b00
110 SVSTATE[38:39] <- 0b00
111 SVSTATE[40:41] <- 0b00
112 SVSTATE[42:46] <- 0b00000
115 # clear out all SVSHAPEs
116 SVSHAPE0[0:31] <- [0] * 32
117 SVSHAPE1[0:31] <- [0] * 32
118 SVSHAPE2[0:31] <- [0] * 32
119 SVSHAPE3[0:31] <- [0] * 32
120 # set schedule up for multiply
121 if (SVrm = 0b0000) then
122 # VL in Matrix Multiply is xd*yd*zd
123 n <- (0b00 || SVxd) * (0b00 || SVyd) * (0b00 || SVzd)
124 vlen[0:6] <- n[14:20]
125 # set up template in SVSHAPE0, then copy to 1-3
126 SVSHAPE0[0:5] <- (0b0 || SVxd) # xdim
127 SVSHAPE0[6:11] <- (0b0 || SVyd) # ydim
128 SVSHAPE0[12:17] <- (0b0 || SVzd) # zdim
129 SVSHAPE0[28:29] <- 0b11 # skip z
131 SVSHAPE1[0:31] <- SVSHAPE0[0:31]
132 SVSHAPE2[0:31] <- SVSHAPE0[0:31]
133 SVSHAPE3[0:31] <- SVSHAPE0[0:31]
135 SVSHAPE1[18:20] <- 0b001 # permute x,z,y
136 SVSHAPE1[28:29] <- 0b01 # skip z
138 SVSHAPE2[18:20] <- 0b001 # permute x,z,y
139 SVSHAPE2[28:29] <- 0b11 # skip y
140 # set schedule up for FFT butterfly
141 if (SVrm = 0b0001) then
142 # calculate O(N log2 N)
145 if SVxd[4-n] = 0 then
148 n <- ((0b0 || SVxd) + 1) * n
150 # set up template in SVSHAPE0, then copy to 1-3
152 SVSHAPE0[0:5] <- (0b0 || SVxd) # xdim
153 SVSHAPE0[30:31] <- 0b01 # Butterfly mode
155 SVSHAPE1[0:31] <- SVSHAPE0[0:31]
156 SVSHAPE2[0:31] <- SVSHAPE0[0:31]
158 SVSHAPE1[28:29] <- 0b01 # j+halfstep schedule
160 SVSHAPE2[28:29] <- 0b10 # k schedule
161 # set schedule up for (i)DCT Inner butterfly
162 # SVrm Mode 2 (Mode 6 for iDCT) is for pre-calculated coefficients,
163 # SVrm Mode 4 (Mode 12 for iDCT) is for on-the-fly (Vertical-First Mode)
164 if ((SVrm = 0b0010) | (SVrm = 0b0100) |
165 (SVrm = 0b1010) | (SVrm = 0b1100)) then
166 # calculate O(N log2 N)
169 if SVxd[4-n] = 0 then
172 n <- ((0b0 || SVxd) + 1) * n
174 # set up template in SVSHAPE0, then copy to 1-3
176 SVSHAPE0[0:5] <- (0b0 || SVxd) # xdim
177 if (SVrm = 0b1010) | (SVrm = 0b1100) then
178 SVSHAPE0[30:31] <- 0b11 # iDCT mode
179 SVSHAPE0[18:20] <- 0b011 # iDCT Inner Butterfly sub-mode
181 SVSHAPE0[30:31] <- 0b01 # DCT mode
182 SVSHAPE0[18:20] <- 0b001 # DCT Inner Butterfly sub-mode
183 SVSHAPE0[21:23] <- 0b001 # "inverse" on outer loop
184 if (SVrm = 0b1100) | (SVrm = 0b0100) then
185 SVSHAPE0[6:11] <- 0b000011 # (i)DCT Inner Butterfly mode 4
187 SVSHAPE0[6:11] <- 0b000001 # (i)DCT Inner Butterfly mode 2
189 SVSHAPE1[0:31] <- SVSHAPE0[0:31]
190 SVSHAPE2[0:31] <- SVSHAPE0[0:31]
191 if (SVrm != 0b0100) & (SVrm != 0b1100) then
192 SVSHAPE3[0:31] <- SVSHAPE0[0:31]
194 SVSHAPE0[28:29] <- 0b01 # j+halfstep schedule
195 # for cos coefficient
196 SVSHAPE2[28:29] <- 0b10 # ci (k for mode 4) schedule
197 if (SVrm != 0b0100) & (SVrm != 0b1100) then
198 SVSHAPE3[28:29] <- 0b11 # size schedule
199 # set schedule up for (i)DCT Outer butterfly
200 if (SVrm = 0b0011) | (SVrm = 0b1011) then
201 # calculate O(N log2 N) number of outer butterfly overlapping adds
205 itercount[0:6] <- (0b00 || SVxd) + 0b0000001
206 itercount[0:6] <- (0b0 || itercount[0:5])
208 if SVxd[4-n] = 0 then
211 count <- (itercount - 0b0000001) * size
212 vlen[0:6] <- vlen + count[7:13]
213 size[0:6] <- (size[1:6] || 0b0)
214 itercount[0:6] <- (0b0 || itercount[0:5])
215 # set up template in SVSHAPE0, then copy to 1-3
217 SVSHAPE0[0:5] <- (0b0 || SVxd) # xdim
218 if (SVrm = 0b1011) then
219 SVSHAPE0[30:31] <- 0b11 # iDCT mode
220 SVSHAPE0[18:20] <- 0b011 # iDCT Outer Butterfly sub-mode
221 SVSHAPE0[21:23] <- 0b101 # "inverse" on outer and inner loop
223 SVSHAPE0[30:31] <- 0b01 # DCT mode
224 SVSHAPE0[18:20] <- 0b100 # DCT Outer Butterfly sub-mode
225 SVSHAPE0[6:11] <- 0b000010 # DCT Butterfly mode
227 SVSHAPE1[0:31] <- SVSHAPE0[0:31]
228 SVSHAPE2[0:31] <- SVSHAPE0[0:31]
230 SVSHAPE1[28:29] <- 0b01 # j+halfstep schedule
231 # set schedule up for DCT COS table generation
232 if (SVrm = 0b0101) | (SVrm = 0b1101) then
233 # calculate O(N log2 N)
235 itercount[0:6] <- (0b00 || SVxd) + 0b0000001
236 itercount[0:6] <- (0b0 || itercount[0:5])
239 if SVxd[4-n] = 0 then
242 vlen[0:6] <- vlen + itercount
243 itercount[0:6] <- (0b0 || itercount[0:5])
244 # set up template in SVSHAPE0, then copy to 1-3
246 SVSHAPE0[0:5] <- (0b0 || SVxd) # xdim
247 SVSHAPE0[30:31] <- 0b01 # DCT/FFT mode
248 SVSHAPE0[6:11] <- 0b000100 # DCT Inner Butterfly COS-gen mode
249 if (SVrm = 0b0101) then
250 SVSHAPE0[21:23] <- 0b001 # "inverse" on outer loop for DCT
252 SVSHAPE1[0:31] <- SVSHAPE0[0:31]
253 SVSHAPE2[0:31] <- SVSHAPE0[0:31]
254 # for cos coefficient
255 SVSHAPE1[28:29] <- 0b10 # ci schedule
256 SVSHAPE2[28:29] <- 0b11 # size schedule
257 # set schedule up for iDCT / DCT inverse of half-swapped ordering
258 if (SVrm = 0b0110) | (SVrm = 0b1110) | (SVrm = 0b1111) then
259 vlen[0:6] <- (0b00 || SVxd) + 0b0000001
260 # set up template in SVSHAPE0
261 SVSHAPE0[0:5] <- (0b0 || SVxd) # xdim
262 if (SVrm = 0b1110) then
263 SVSHAPE0[18:20] <- 0b001 # DCT opposite half-swap
264 if (SVrm = 0b1111) then
265 SVSHAPE0[30:31] <- 0b01 # FFT mode
267 SVSHAPE0[30:31] <- 0b11 # DCT mode
268 SVSHAPE0[6:11] <- 0b000101 # DCT "half-swap" mode
269 # set VL, MVL and Vertical-First
271 SVSTATE[7:13] <- vlen
274 Special Registers Altered:
282 * svindex SVG,rmm,SVd,ew,yx,mr,sk
286 # based on nearest MAXVL compute other dimension
290 do while d*dim <u ([0]*4 || MVL)
292 # set up template, then copy once location identified
294 shape[30:31] <- 0b00 # mode
296 shape[18:20] <- 0b110 # indexed xd/yd
297 shape[0:5] <- (0b0 || SVd) # xdim
298 if sk = 0 then shape[6:11] <- 0 # ydim
299 else shape[6:11] <- 0b111111 # ydim max
301 shape[18:20] <- 0b111 # indexed yd/xd
302 if sk = 1 then shape[6:11] <- 0 # ydim
303 else shape[6:11] <- d-1 # ydim max
304 shape[0:5] <- (0b0 || SVd) # ydim
305 shape[12:17] <- (0b0 || SVG) # SVGPR
306 shape[28:29] <- ew # element-width override
307 if sk = 1 then shape[28:29] <- 0b01 # skip 1st dimension
308 else shape[28:29] <- 0b00 # no skipping
309 # select the mode for updating SVSHAPEs
310 SVSTATE[62] <- mm # set or clear persistence
312 # clear out all SVSHAPEs first
313 SVSHAPE0[0:31] <- [0] * 32
314 SVSHAPE1[0:31] <- [0] * 32
315 SVSHAPE2[0:31] <- [0] * 32
316 SVSHAPE3[0:31] <- [0] * 32
317 SVSTATE[32:41] <- [0] * 10 # clear REMAP.mi/o
318 SVSTATE[42:46] <- rmm # rmm exactly REMAP.SVme
322 # activate requested shape
323 if idx = 0 then SVSHAPE0 <- shape
324 if idx = 1 then SVSHAPE1 <- shape
325 if idx = 2 then SVSHAPE2 <- shape
326 if idx = 3 then SVSHAPE3 <- shape
327 SVSTATE[bit*2+32:bit*2+33] <- idx
328 # increment shape index, modulo 4
329 if idx = 3 then idx <- 0
332 # refined SVSHAPE/REMAP update mode
335 if idx = 0 then SVSHAPE0 <- shape
336 if idx = 1 then SVSHAPE1 <- shape
337 if idx = 2 then SVSHAPE2 <- shape
338 if idx = 3 then SVSHAPE3 <- shape
339 SVSTATE[bit*2+32:bit*2+33] <- idx
342 Special Registers Altered: