openpower/isa/stringldst.mdwn

   1 <!-- Instructions here described in PowerISA Version 3.0 B Book 1 -->
   2
   3 <!-- Section 3.3.7 Fixed-Point Move Assist Instructions [Phased Out] pages 63 - 65 -->
   4
   5 <!-- The Move Assist instructions allow movement of an arbitrary sequence of bytes -->
   6 <!-- from storage to registers or from registers to storage without concern for -->
   7 <!-- alignment. These instructions can be used for a short move between arbitrary -->
   8 <!-- storage locations or to initiate a long move between unaligned storage fields. -->
   9
  10
  11 # Load String Word Immediate
  12
  13 X-Form
  14
  15 * lswi RT,RA,NB
  16
  17 Pseudo-code:
  18
  19     EA <- (RA|0)
  20     if NB = 0 then n <-  32
  21     else           n <-  NB
  22     r <- RT - 1
  23     i <- 32
  24     do while n > 0
  25         if i = 32 then
  26             r <- (r + 1) % 32
  27             GPR(r) <- 0
  28         GPR(r)[i:i+7] <- MEM(EA, 1)
  29         i <- i + 8
  30         if i = 64 then i <- 32
  31         EA <- EA + 1
  32         n <- n - 1
  33
  34 Special Registers Altered:
  35
  36     None
  37
  38 # Load String Word Indexed
  39
  40 X-Form
  41
  42 * lswx RT,RA,RB
  43
  44 Pseudo-code:
  45
  46     b <- (RA|0)
  47     EA <- b + (RB)
  48     n <- XER[57:63]
  49     r <- RT - 1
  50     i <- 32
  51     RT <- undefined([0]*64)
  52     do while n > 0
  53         if i = 32 then
  54             r <-  (r + 1) % 32
  55             GPR(r) <- 0
  56         GPR(r)[i:i+7] <- MEM(EA, 1)
  57         i <-  i + 8
  58         if i = 64 then i <- 32
  59         EA <-  EA + 1
  60         n <- n - 1
  61
  62 Special Registers Altered:
  63
  64     None
  65
  66 # Store String Word Immediate
  67
  68 X-Form
  69
  70 * stswi RS,RA,NB
  71
  72 Pseudo-code:
  73
  74     EA <- (RA|0)
  75     if NB = 0 then n <-  32
  76     else           n <-  NB
  77     r <- RS - 1
  78     i <- 32
  79     do while n > 0
  80       if i = 32 then r <-  (r + 1) % 32
  81       MEM(EA, 1) <-  GPR(r)[i:i+7]
  82       i <-  i + 8
  83       if i = 64 then i <-  32
  84       EA <-  EA + 1
  85       n <- n - 1
  86
  87 Special Registers Altered:
  88
  89     None
  90
  91 # Store String Word Indexed
  92
  93 X-Form
  94
  95 * stswx RS,RA,RB
  96
  97 Pseudo-code:
  98
  99     b <- (RA|0)
 100     EA <- b + (RB)
 101     n <- XER[57:63]
 102     r <- RS - 1
 103     i <- 32
 104     do while n > 0
 105       if i = 32 then r <- (r + 1) % 32
 106       MEM(EA, 1) <- GPR(r)[i:i+7]
 107       i <-  i + 8
 108       if i = 64 then i <- 32
 109       EA <-  EA + 1
 110       n <- n - 1
 111
 112 Special Registers Altered:
 113
 114     None
 115
 116 <!-- Checked March 2021 -->