1 # A.1 Floating-Point Round to Single-Precision Model
3 The following describes algorithmically the operation of the Floating
4 Round to Single-Precision instruction.
6 <!-- Power ISA Book I Version 3.0B Section A.1 page 775-778 -->
8 def Round_Single( sign, exp, frac, G, R, X, round_mode ):
13 xbit <- (frac[26:52] || G || R || X) != 0
15 if round_mode = 0b00 then # Round to Nearest
16 if (lsb = 1) & (gbit = 1) then inc <- 1
17 if (lsb = 0) & (gbit = 1) & (rbit = 1) then inc <- 1
18 if (lsb = 0) & (gbit = 1) & (xbit = 1) then inc <- 1
19 if round_mode = 0b10 then # Round toward + Infinity
20 if (sign = 0) & (gbit = 1) then inc <-1
21 if (sign = 0) & (rbit = 1) then inc <-1
22 if (sign = 0) & (xbit = 1) then inc <-1
23 if round_mode = 0b11 then # Round toward - Infinity
24 if (sign = 1) & (gbit = 1) then inc <-1
25 if (sign = 1) & (rbit = 1) then inc <-1
26 if (sign = 1) & (xbit = 1) then inc <-1
30 tmp[1:24] <- frac[0:23]
31 tmp[0:24] <- tmp[0:24] + inc
33 frac[0:23] <- tmp[1:24]
36 frac[0:23] <- 0b1 || frac[0:22]
40 # FPSCR[FI] <- gbit || rbit || xbit
42 def DOUBLE2SINGLE(FR):
43 if (FR[1:11] <u 897) & (FR[1:63] >u 0) then
45 mode = 'disabled_exp_underflow'
46 # TODO if FPSCR_UE = 0 then mode = 'disabled_exp_underflow'
47 # TODO if FPSCR_UE = 1 then mode = 'enabled_exp_underflow'
48 else if (FR[1:11] >u 1150) & (FR[1:11] <u 2047) then
50 mode = 'disabled_exp_overflow'
51 # TODO if FPSCR_OE = 0 then mode = 'disabled_exp_overflow'
52 # TODO if FPSCR_OE = 1 then mode = 'enabled_exp_overflow'
53 else if (FR[1:11] >u 896) & (FR[1:11] <u 1151) then
55 mode <- 'normal_operand'
56 else if (FR[1:63] = 0) then
58 mode <- 'zero_operand'
59 else if (FR[1:11] = 2047) then
61 if (FR[12:63] = 0) then
63 else if (FR[12] = 1) then
64 mode <- 'qnan_operand'
65 else if (FR[12] = 0) & (FR[13:63] >u 0) then
66 mode <- 'snan_operand'
72 if mode = 'normal_operand' then
74 exp <- FR[1:11] - 1023
75 frac[0:52] <- 0b1 || FR[12:63]
77 Round_Single(sign, exp, frac, 0b0, 0b0, 0b0, RN)
78 # TODO FPSCR[XX] <- FPSCR[XX] || FPSCR[FI]
80 mode = 'disabled_exp_overflow'
81 # if FPSCR_OE = 0 then mode = 'disabled_exp_overflow'
82 # if FPSCR_OE = 1 then mode = 'enabled_overflow'
85 result[1:11] <- exp + 1023
86 result[12:63] <- frac[1:52]
88 # FPSCR[FPRF] <- '+ normal number'
90 # FPSCR[FPRF] <- '- normal number'
92 if mode = 'enabled_exp_underflow':
96 frac[0:52] <- 0b0 || FRB[12:63]
98 exp <- FRB[1:11] - 1023
99 frac[0:52] <- 0b1 || FRB[12:63]
100 # denormalise operand
109 frac[0:52] <- frac[1:52] || 0b0
111 # FPCSR_UX <- (frac[0:52] || G || R || X) >u 0)
113 Round_Single(sign, exp, frac, G, R, X, RN)
115 if mode = 'zero_operand':
117 result[0] <- FR[0] # copy sign, the rest is zero
121 #FPSCR[FPRF] <- '+ zero'
123 if mode = 'disabled_exp_underflow':
124 if sign = 1 then frac[0:63] <- ¬frac[0:63] + 1
125 # do the loop 0 times if FR = max negative 64-bit integer or
126 # if FR = max unsigned 64-bit integer
128 frac[0:63] <- frac[1:63] || 0b0
131 RN <- 0b00 # TODO, FPSCR[RN]
132 Round_Float( tgt_precision, sign, exp, frac, RN )
134 #if sign = 0 then FPSCR[FPRF] <- '+normal number'
135 #if sign = 1 then FPSCR[FPRF] <- '-normal number'
137 result[1:11] <- exp + 1023 # exp + bias
138 result[12:63] <- frac[1:52]