7 | PO | BO| BI | BD |AA|LK |
10 |0 |6 |10 |15 |22 |23 |31|
11 | PO | RS | me | sh | me | XO |Rc|
14 |0 |6 |11 |16 |21 |26 |27 31|
15 | PO | RT | RA | RB |bm |L | XO |
18 |0 |6 |9 |12 |15 |18 |21 |29 |31 |
19 | PO | BF | BFA| BFB| BFC| msk| TLI | XO |msk|
22 |0 |6 |11 |16 |20 |27 |30 |31 |
23 | PO | ///| ///| // | LEV | //| 1| / |
26 |0 |6 |9 |10 |11 |16 |31 |
31 | PO | BF | / | L | RA| SI |
32 | PO | BF | / | L | RA| UI |
38 |0 |6 |11 |16 |30 |31 |
39 | PO | RT | RA | DS | XO |
40 | PO | RS | RA | DS | XO |
41 | PO | RSp | RA | DS | XO |
42 | PO | FRTp | RA | DS | XO |
43 | PO | FRSp | RA | DS | XO |
46 |0 |6 |11 |16 |28|29 |31 |
47 | PO | RTp | RA | DQ | PT |
48 | PO | S | RA | DQ |SX| XO |
49 | PO | T | RA | DQ |TX| XO |
52 |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 |
53 | PO | RT | RA | /// | XO | / |
54 | PO | RT | RA | RB | XO | / |
55 | PO | RT | RA | RB | XO |EH |
56 | PO | RT | RA | NB | XO | / |
57 | PO | RT | /|SR | /// | XO | / |
58 | PO | RT | /// | RB | XO | / |
59 | PO | RT | /// | RB | XO | 1 |
60 | PO | RT | /// | /// | XO | / |
61 | PO | RS | RA | RB | XO |Rc |
62 | PO | RT | RA | RB | XO |Rc |
63 | PO | RS | RA | RB | XO | 1 |
64 | PO | RS | RA | RB | XO | / |
65 | PO | RS | RA | NB | XO | / |
66 | PO | RS | RA | SH | XO |Rc |
67 | PO | RS | RA | /// | XO |Rc |
68 | PO | RS | RA | /// | XO | / |
69 | PO | RS | /|SR | /// | XO | / |
70 | PO | RS | /// | RB | XO | / |
71 | PO | RS | /// | /// | XO | / |
72 | PO | RS | /// |L1| /// | XO | / |
73 | PO | TH | RA | RB | XO | / |
74 | PO | BF |/ | L | RA | RB | XO | / |
75 | PO | BF |// | FRA | FRB | XO | / |
76 | PO | BF |// | BFA | // | /// | XO | / |
77 | PO | BF |// | /// |W | U |/ | XO |Rc |
78 | PO | BF |// | /// | /// | XO | / |
79 | PO | TH | RA | RB | XO | / |
80 | PO | /| CT | /// | /// | XO | / |
81 | PO | /| CT | RA | RB | XO | / |
82 | PO | /// | L2 | RA | RB | XO | / |
83 | PO | /// | L2 | /// | RB | XO | / |
84 | PO | /// | L2 | /// | /// | XO | / |
85 | PO | /// | L2 | /| E | /// | XO | / |
86 | PO | TO | RA | RB | XO | / |
87 | PO | FRT | RA | RB | XO | / |
88 | PO | FRT | FRA | FRB | XO | / |
89 | PO | FRTp | RA | RB | XO | / |
90 | PO | FRT | /// | FRB | XO |Rc |
91 | PO | FRT | /// | FRBp | XO |Rc |
92 | PO | FRT | /// | /// | XO |Rc |
93 | PO | FRTp | /// | FRB | XO |Rc |
94 | PO | FRTp | /// | FRBp | XO |Rc |
95 | PO | FRTp | FRA | FRBp | XO |Rc |
96 | PO | FRTp | FRAp | FRBp | XO |Rc |
97 | PO | BF |// | FRA | FRBp | XO | / |
98 | PO | BF |// | FRAp | FRBp | XO | / |
99 | PO | FRT |S | | FRB | XO |Rc |
100 | PO | FRTp |S | | FRBp | XO |Rc |
101 | PO | FRS | RA | RB | XO | / |
102 | PO | FRSp | RA | RB | XO | / |
103 | PO | BT | /// | /// | XO |Rc |
104 | PO | /// | RA | RB | XO | / |
105 | PO | /// | /// | RB | XO | / |
106 | PO | /// | /// | /// | XO | / |
107 | PO | /// | /// | E|/// | XO | / |
108 | PO | //|IH | /// | /// | XO | / |
109 | PO | A|// | /// | /// | XO | 1 |
110 | PO | A|// |R | /// | /// | XO | 1 |
111 | PO | /// | RA | RB | XO | 1 |
112 | PO | /// |WC | /// | /// | XO | / |
113 | PO | /// |T | RA | RB | XO | / |
114 | PO | VRT | RA | RB | XO | / |
115 | PO | VRS | RA | RB | XO | / |
116 | PO | MO | /// | /// | XO | / |
117 | PO | RT | /// |L3 | /// | XO | / |
120 |0 |6 |9 |11 |14 |16 |19|20|21 |31 |
121 | PO | BT | BA | BB | XO | / |
122 | PO | BO | BI | /// |BH | XO |LK |
123 | PO | | /// |S | XO | / |
124 | PO | BF |// |BFA |// | /// | XO | / |
125 | PO | /// | XO | / |
129 |0 |6 |11|12 |20|21 |31 |
130 | PO | RT | spr | XO | / |
131 | PO | RT | tbr | XO | / |
132 | PO | RT |0 | /// | XO | / |
133 | PO | RT |1 | FXM |/ | XO | / |
134 | PO | RT | dcr | XO | / |
135 | PO | RT | pmrn | XO | / |
136 | PO | RT | BHRBE | XO | / |
137 | PO | DUI | DUIS | XO | / |
138 | PO | RS |0 | FXM |/ | XO | / |
139 | PO | RS |1 | FXM |/ | XO | / |
140 | PO | RS | spr | XO | / |
141 | PO | RS | dcr | XO | / |
142 | PO | RS | pmrn | XO | / |
145 |0 |6|7 |15|16 |21 |31 |
146 | PO |L| FLM |W |FRB | XO |Rc |
149 |0 |6 |11 |16 |21 |31 |
150 | PO | T | RA | RB | XO |TX |
151 | PO | S | RA | RB | XO |SX |
154 |0 |6 |9 |11 |14 |16 |21 |30|31 |
155 | PO | T | /// | B |XO |BX|TX |
156 | PO | T | /// |UIM | B |XO |BX|TX |
157 | PO | BF | //| /// | B |XO |BX| / |
160 |0 |6 |9 |11 |16 |21 |22 |24 |29|30|31 |
161 | PO | T | A | B | XO |AX|BX|TX |
162 | PO | T | A | B |Rc | XO |AX|BX|TX |
163 | PO | BF | // | A | B | XO |AX|BX|/ |
164 | PO | T | A | B |XO |SHW | XO |AX|BX|TX |
165 | PO | T | A | B |XO |DM | XO |AX|BX|TX |
168 |0 |6 |11 |16 |21 |26 |28|29 |30|31 |
169 | PO | T | A | B | C | XO |CX|AX |BX|TX |
172 |0 |6 |11 |16 |21 |30|31 |
173 | PO | RS | RA | sh | XO |sh|Rc |
176 |0 |6 |11 |16 |22 |31 |
177 | PO | RT | RA | XBI | XO |Rc |
180 |0 |6 |11 |16 |21 |22 |31 |
181 | PO | RT| RA| RB |OE | XO |Rc |
182 | PO | RT| RA| RB | /| XO |Rc |
183 | PO | RT| RA| RB | /| XO | / |
184 | PO | RT| RA| /// |OE | XO |Rc |
187 |0 |6 |11 |16 |21 |26 |31 |
188 | PO | FRT | FRA | FRB | FRC | XO |Rc |
189 | PO | FRT | FRA | FRB | /// | XO |Rc |
190 | PO | FRT | FRA | /// | FRC | XO |Rc |
191 | PO | FRT | /// | FRB | /// | XO |Rc |
192 | PO | RT | RA | RB | BC | XO | /|
195 |0 |6 |11 |16 |21 |26 |31|
196 | PO | RS | RA | RB | MB | ME |Rc|
197 | PO | RS | RA | SH | MB | ME |Rc|
200 |0 |6 |11 |16 |21 |27|30|31|
201 | PO | RS | RA | sh | mb |XO|sh|Rc|
202 | PO | RS | RA | sh | me |XO|sh|Rc|
205 |0 |6 |11 |16 |21 |27 |31|
206 | PO | RS | RA | RB | mb | XO |Rc|
207 | PO | RS | RA | RB | me | XO |Rc|
210 |0 |6 |11 |16 |21|22 |25|26 |31|
211 | PO | RT | RA | RB | RC | XO |
212 | PO | VRT | VRA | VRB | VRC | XO |
213 | PO | VRT | VRA | VRB | /|SHB | XO |
214 | PO | VRT | VRA | VRB | /|BFA|/ | XO |
217 |0 |6 |11 |16 |21 |24|26 |31|
218 | PO | RT | RA | RB | RC | XO |Rc|
221 |0 |6 |11 |16 |21|22 |31|
222 | PO | VRT | VRA | VRB |Rc| XO |
225 |0 |6 |11 |16 |21 |31|
226 | PO | VRT | VRA | VRB | XO |
227 | PO | VRT | /// | VRB | XO |
228 | PO | VRT | UIM | VRB | XO |
229 | PO | VRT | / UIM | VRB | XO |
230 | PO | VRT | // UIM | VRB | XO |
231 | PO | VRT | /// UIM | VRB | XO |
232 | PO | VRT | SIM | ///| XO |
233 | PO | VRT | ///| | XO |
234 | PO | |/// | VRB | XO |
237 |0 |6 |9 |11 |16 |21 |31|
238 | PO | RS | RA | RB | XO |
239 | PO | RS | RA | UI | XO |
240 | PO | RT | ///| RB | XO |
241 | PO | RT | RA | RB | XO |
242 | PO | RT | RA | ///| XO |
243 | PO | RT | UI | RB | XO |
244 | PO | BF|//| RA | RB | XO |
245 | PO | RT | RA | UI | XO |
246 | PO | RT | SI | ///| XO |
249 |0 |6 |11 |16 |21 |29 |31 |
250 | PO | RT| RA | RB | XO |BFA |
253 |0 |6 |9 |11 |16 |22 |31 |
254 | PO | BF|//| FRA | DCM | XO | / |
255 | PO | BF|//| FRAp | DCM | XO | / |
256 | PO | BF|//| FRA | DGM | XO | / |
257 | PO | BF|//| FRAp | DGM | XO | / |
258 | PO | FRT | FRA | SH | XO |Rc |
259 | PO | FRTp| FRAp | SH | XO |Rc |
262 |0 |6 |11 |15 |16 |21 |23 |31 |
263 | PO | FRT | TE | FRB |RMC| XO |Rc |
264 | PO | FRTp| TE | FRBp |RMC| XO |Rc |
265 | PO | FRT | FRA | FRB |RMC| XO |Rc |
266 | PO | FRTp| FRA | FRBp |RMC| XO |Rc |
267 | PO | FRTp| FRAp | FRBp |RMC| XO |Rc |
268 | PO | FRT | /// | R | FRB |RMC| XO |Rc |
269 | PO | FRTp| /// | R | FRBp |RMC| XO |Rc |
271 # V3.0B 1.6.6 DX-FORM
272 |0 |6 |11 |16 |26 |31
273 | PO | RT| d1| d0| XO|d2
276 |0 |6 |11 |16 |21 |23|24|25|26 31|
277 | PO | RS |mask | SVd |ew |yx|mm|sk| XO |
280 |0 |6 |11 |16 |23 |24 |25 |26 |31 |
281 | PO | RT | RA | SVi |ms |vs |vf | XO |Rc |
285 | PO | SCi | SCm | SCimm |
289 | PO | SCi | SCm | SRbr | SRimm |
292 |0 |6 |11 |16 |21 |31 |
293 | PO | RT | RA| RC | SVD |
294 | PO | RS | RA| RC | SVD |
295 | PO | FRT | RA| RC | SVD |
296 | PO | FRS | RA| RC | SVD |
299 |0 |6 |11 |16 |21 |30 |31 |
300 | PO | RT | RA | RC | SVDS | XO |
301 | PO | RS | RA | RC | SVDS | XO |
304 |0 |6 |11 |16 |21 |25 |26 |31 |
305 | PO | SVxd | SVyd | SVzd | SVRM |vf | XO |
308 |0 |6 |11 |13 |15 |17 |19 |21 |22 |26 |31 |
309 | PO | SVme |mi0 | mi1 | mi2 | mo0 | mo1 |pst |/// | XO |
312 |0 |6 |11 |16 |21 |29 |31 |
313 | PO | RT | RA | RB | TLI | XO |Rc |
314 | PO | RT | RA | RB | TLI | XO |L |
316 # 1.6.28 Instruction Fields
318 Field used by the tbegin. instruction to specify an
319 implementation-specific function.
320 Field used by the tend. instruction to specify the
321 completion of the outer transaction and all nested
326 0 The immediate field represents an address
327 relative to the current instruction address. For
328 I-form branches the effective address of the
329 branch target is the sum of the LI field
330 sign-extended to 64 bits and the address of
331 the branch instruction. For B-form branches
332 the effective address of the branch target is
333 the sum of the BD field sign-extended to 64
334 bits and the address of the branch instruction.
335 1 The immediate field represents an absolute
336 address. For I-form branches the effective
337 address of the branch target is the LI field
338 sign-extended to 64 bits. For B-form branches
339 the effective address of the branch target is
340 the BD field sign-extended to 64 bits.
343 Fields that are concatenated to specify a VSR to
347 Field used to specify a bit in the CR to be used as
351 Field used to specify a bit in the CR to be used as
355 Field used to specify a bit in the CR to be used as
359 Immediate field used to specify a 14-bit signed
360 two's complement branch displacement which is
361 concatenated on the right with 0b00 and
362 sign-extended to 64 bits.
365 Field used to specify one of the CR fields or one of
366 the FPSCR fields to be used as a target.
367 Formats: D, X, XL, XX2, XX3, Z22
369 Field used to specify one of the CR fields
370 to be used as a source.
373 Field used to specify one of the CR fields or one of
374 the FPSCR fields to be used as a source.
377 Field used to specify one of the CR fields or one of
378 the FPSCR fields to be used as a source.
381 Field used to specify a hint in the Branch Condi-
382 tional to Link Register and Branch Conditional to
383 Count Register instructions. The encoding is
384 described in Section 2.4, 'Branch Instructions'.
387 Field used to identify the BHRB entry to be used
388 as a source by the Move From Branch History
389 Rolling Buffer instruction.
392 Field used to specify a bit in the CR to be tested by
393 a Branch Conditional instruction.
396 Field used to specify the Bit-mask Mode for bmask
399 Field used to specify options for the Branch Condi-
400 tional instructions. The encoding is described in
401 Section 2.4, 'Branch Instructions'.
402 Formats: B, XL, X, XL
404 Field used to specify a bit in the CR or in the
405 FPSCR to be used as a target.
408 Fields that are concatenated to specify a VSR to
410 Formats: XX2, XX3, XX4
412 Field used in X-form instructions to specify a cache
413 target (see Section 4.3.2 of Book II).
416 Fields that are concatenated to specify a VSR to
420 Immediate field used to specify a 16-bit signed
421 two's complement integer which is sign-extended
424 d0,d1,d2 (16:25,11:15,31)
425 Immediate fields that are concatenated to specify a
426 16-bit signed two's complement integer which is
427 sign-extended to 64 bits.
429 dc,dm,dx (25,29,11:15)
430 Immediate fields that are concatenated to specify
434 Immediate field used to specify Data Class Mask.
437 Immediate field used to specify Data Class Mask.
440 Immediate field used as the Data Group Mask.
443 Immediate field used by xxpermdi instruction as
444 doubleword permute control.
447 Immediate operand field used to specify new deci-
448 mal floating-point rounding mode.
451 Field used by the dnh instruction (see Book III-E).
454 Field used by the dnh instruction (see Book III-E).
457 Immediate field used to specify a 12-bit signed
458 two's complement integer which is concatenated
459 on the right with 0b0000 and sign-extended to 64
463 Immediate field used to specify a 14-bit signed
464 two's complement integer which is concatenated
465 on the right with 0b00 and sign-extended to 64 bits.
468 Field used by the Write MSR External Enable
469 instruction (see Book III-E).
472 Field used to specify the access types ordered by
473 an Elemental Memory Barrier type of sync instruc-
476 Field used to specify a hint in the Load and
477 Reserve instructions. The meaning is described in
478 Section 4.6.2, 'Load and Reserve and Store Con-
479 ditional Instructions', in Book II.
482 Expanded opcode field
485 Expanded opcode field
488 Field used to specify Inexact form of round to
489 quad-precision integer.
492 Field used to specify the element width for SVI-Form
495 Field used to specify the function code in Load/
496 Store Atomic instructions.
499 Field mask used to identify the FPSCR fields that
500 are to be updated by the mtfsf instruction.
503 Field used to specify a FPR to be used as a
505 Formats: A, X, Z22, Z23
507 Field used to specify an even/odd pair of FPRs to
508 be concatenated and used as a source.
511 Field used to specify an FPR to be used as a
513 Formats: A, X, XFL, Z23
515 Field used to specify an even/odd pair of FPRs to
516 be concatenated and used as a source.
519 Field used to specify an FPR to be used as a
523 Field used to specify an FPR to be used as a
527 Field used to specify an even/odd pair of FPRs to
528 be concatenated and used as a source.
531 Field used to specify an FPR to be used as a tar-
533 Formats: A, D, X, Z22, Z23
535 Field used to specify an even/odd pair of FPRs to
536 be concatenated and used as a target.
537 Formats: DS, X, Z22, Z23
539 Field mask used to identify the CR fields that are to
540 be written by the mtcrf and mtocrf instructions, or
541 read by the mfocrf instruction.
544 Immediate field used to specify a 5-bit signed inte-
548 Field used to specify a hint in the SLB Invalidate
549 All instruction. The meaning is described in
550 Section 5.9.3.2, 'SLB Management Instructions',
554 Immediate field used to specify an 8-bit integer.
557 Immediate field used to specify a 5-bit signed inte-
561 Field used to specify whether the mtfsf instruction
562 updates the entire FPSCR.
565 Field used by the Data Cache Block Flush instruc-
566 tion (see Section 4.3.2 of Book II) and also by the
567 Synchronize instruction (see Section 4.6.3 of Book
571 Field used to specify whether a fixed-point Com-
572 pare instruction is to compare 64-bit numbers or
574 Field used by the Compare Range Byte instruction
575 to indicate whether to compare against 1 or 2
579 Field used by the Move To Machine State Register
580 instruction (see Book III).
581 Field used by the SLB Move From Entry VSID and
582 SLB Move From Entry ESID instructions for imple-
583 mentation-specific purposes.
586 Field used by the Deliver A Random Number
587 instruction (see Section 3.3.9, 'Fixed-Point Arith-
588 metic Instructions') to choose the random number
592 Field used to specify whether mask-in occurs in bmask
595 Field used to specify whether the grevlut instruction
596 updates the whole GPR or the first half.
599 Field used by the System Call instructions.
602 Immediate field used to specify a 24-bit signed
603 two's complement integer which is concatenated
604 on the right with 0b00 and sign-extended to 64
609 0 Do not set the Link Register.
610 1 Set the Link Register. The address of the
611 instruction following the Branch instruction is
612 placed into the Link Register.
615 Field used to specify a REMAP shape for SVI-Form
618 Field used in M-form instructions to specify the first
619 1-bit of a 64-bit mask, as described in
620 Section 3.3.14, 'Fixed-Point Rotate and Shift
621 Instructions' on page 101.
624 Field used in MD-form and MDS-form instructions
625 to specify the first 1-bit of a 64-bit mask, as
626 described in Section 3.3.14, 'Fixed-Point Rotate
627 and Shift Instructions' on page 101.
630 Field used in MD-form and MDS-form instructions
631 to specify the last 1-bit of a 64-bit mask, as
632 described in Section 3.3.14, 'Fixed-Point Rotate
633 and Shift Instructions' on page 101.
636 Field used in M-form instructions to specify the last
637 1-bit of a 64-bit mask, as described in
638 Section 3.3.14, 'Fixed-Point Rotate and Shift
639 Instructions' on page 101.
642 Field used in REMAP to select the SVSHAPE for 1st input register
645 Field used in REMAP to select the SVSHAPE for 2nd input register
648 Field used in REMAP to select the SVSHAPE for 3rd input register
651 Field used to specify the meaning of the mask field for SVI-Form
654 Field used in REMAP to select the SVSHAPE for 1st output register
657 Field used in REMAP to select the SVSHAPE for 2nd output register
660 Field used in X-form instructions to specify a sub-
661 set of storage accesses.
664 Field used in Simple-V to specify whether MVL is to be set
667 Field used to specify the number of bytes to move
668 in an immediate Move Assist instruction.
671 Field used by the Embedded Hypervisor Privilege
675 Field used by XO-form instructions to enable set-
676 ting OV and SO in the XER.
679 Primary opcode field.
682 Field used to specify whether to invalidate pro-
683 cess- or partition-scoped entries for tlbie[l].
686 Field used to specify preferred sign for BCD opera-
690 Field used in REMAP to indicate "persistence" mode (REMAP
691 continues to apply to multiple instructions)
694 Immediate field used to specify a 4-bit unsigned
698 Field used by the tbegin. instruction to specify the
702 Immediate field that specifies whether the RMC is
703 specifying the primary or secondary encoding
704 Field used to specify whether to invalidate Radix
705 Tree or HPT entries for tlbie[l].
708 Field used to specify a GPR to be used as a
709 source or as a target.
710 Formats: A, BM2, D, DQ, DQE, DS, M, MD, MDS, TX, VA, VA2, VX, X, XO, XS, SVL, XB
712 Field used to specify a GPR to be used as a
714 Formats: A, BM2, M, MDS, VA, VA2, X, XO
717 0 Do not alter the Condition Register.
718 1 Set Condition Register Field 6 as described in
719 Section 2.3.1, 'Condition Register' on
723 Field used to specify a GPR to be used as a
725 Formats: VA, VA2, SVD, SVDS
728 0 Do not alter the Condition Register.
729 1 Set Condition Register Field 0 or Field 1 as
730 described in Section 2.3.1, 'Condition Regis-
732 Formats: A, M, MD, MDS, VA2, X, XFL, XO, XS, Z22, Z23, SVL, XB, TLI
734 Field used to specify what types of entries to inval-
738 Immediate operand field used to specify new
739 binary floating-point rounding mode.
742 Immediate field used for DFP rounding mode con-
746 Round to Odd override
749 Field used to specify a GPR to be used as a
751 Formats: D, DS, M, MD, MDS, SVI, X, XFX, XS
753 Field used to specify an even/odd pair of GPRs to
754 be concatenated and used as a source.
757 Field used to specify a GPR to be used as a target.
758 Formats: A, BM2, D, DQE, DS, DX, VA, VA2, VX, X, XFX, XO, XX2, SVL, XB
760 Field used to specify an even/odd pair of GPRs to
761 be concatenated and used as a target.
764 Immediate field that specifies signed versus
768 Immediate field that specifies whether or not the
769 rfebb instruction re-enables event-based
773 Index to SV Context Propagation SPR
776 SV Context Propagation Mode
779 SV Context Propagation immediate bitfield
782 SV REMAP byte-reversal field.
785 SV REMAP immediate FIFO bitfield
788 Field used to specify a shift amount.
791 Field used to specify a shift amount.
794 Fields that are concatenated to specify a shift
798 Field used to specify a shift amount in bytes.
801 Field used to specify a shift amount in words.
804 Immediate field used to specify a 5-bit signed inte-
808 Immediate field used to specify a 16-bit signed
812 Immediate field used to specify a 5-bit signed inte-
816 Field used to specify dimensional skipping in svindex
819 Immediate field that specifies signed versus
823 Field used to specify a Special Purpose Register
824 for the mtspr and mfspr instructions.
827 Field used by the Segment Register Manipulation
828 instructions (see Book III).
831 Immediate field used to specify an 11-bit signed
832 two's complement integer which is sign-extended
836 Immediate field used to specify a 9-bit signed
837 two's complement integer which is concatenated
838 on the right with 0b00 and sign-extended to 64 bits.
841 Simple-V immediate field for setting VL or MVL
844 Simple-V "REMAP" map-enable bits (0-4)
847 Simple-V "REMAP" Mode
850 Simple-V "REMAP" x-dimension size
853 Simple-V "REMAP" y-dimension size
856 Simple-V "REMAP" z-dimension size
859 Fields SX and S are concatenated to specify a
860 VSR to be used as a source.
863 Fields SX and S are concatenated to specify a
864 VSR to be used as a source.
867 Field used to specify the type of invalidation done
868 by a TLB Invalidate Local instruction (see Book
872 Field used by the Move From Time Base instruc-
873 tion (see Section 6.1 of Book II).
876 Immediate field that specifies a DFP exponent.
879 Field used by the data stream variant of the dcbt
880 and dcbtst instructions (see Section 4.3.2 of Book
884 Field used by the ternlogi instruction as the
888 Field used to specify the conditions on which to
889 trap. The encoding is described in
890 Section 3.3.10.1, 'Character-Type Compare
891 Instructions' on page 87.
894 Fields that are concatenated to specify a VSR to
895 be used as either a target.
898 Fields that are concatenated to specify a VSR to
899 be used as either a target or a source.
900 Formats: X, XX2, XX3, XX4
902 Immediate field used as the data to be placed into
903 a field in the FPSCR.
906 Immediate field used to specify a 5-bit unsigned
910 Immediate field used to specify a 16-bit unsigned
914 Immediate field used to specify a 5-bit unsigned
918 Immediate field used to specify a 4-bit unsigned
922 Immediate field used to specify a 3-bit unsigned
926 Immediate field used to specify a 2-bit unsigned
930 Field used to specify a VR to be used as a source.
933 Field used to specify a VR to be used as a source.
936 Field used to specify a VR to be used as a source.
939 Field used to specify a VR to be used as a source.
942 Field used to specify a VR to be used as a target.
943 Formats: DS, VA, VC, VX, X
945 Field used in Simple-V to specify whether "Vertical" Mode is set
948 Field used in Simple-V to specify whether VL is to be set
951 Field used by the mtfsfi and mtfsf instructions to
952 specify the target word in the FPSCR.
955 Field used to specify the condition or conditions
956 that cause instruction execution to resume after
957 executing a wait instruction (see Section 4.6.4 of
961 Field used to specify a bit in the XER.
962 Formats: MDS, MDS, TX
964 Field used to specify a 6-bit unsigned immediate for bit manipulation
965 instructions, such as grevi.
968 Extended opcode field.
971 Extended opcode field.
974 Extended opcode field.
977 Extended opcode field.
980 Extended opcode field.
983 Extended opcode field.
984 Formats: X, XFL, XFX, XL
986 Extended opcode field.
989 Extended opcode field.
990 Formats: XO, XX3, Z22, XB
992 Extended opcode field.
995 Extended opcode field.
998 Extended opcode field.
1001 Extended opcode field.
1004 Extended opcode field.
1005 Formats: A, DX, VA2, SVL
1007 Extended opcode field.
1008 Formats: VA, SVM, SVRM, SVI
1010 Extended opcode field.
1013 Extended opcode field.
1016 Extended opcode field.
1019 Extended opcode field.
1022 Extended opcode field.
1025 Extended opcode field.
1026 Formats: DQE, DS, SC
1028 Field used to specify loop dimension order in svindex