7 | PO | BO| BI | BD |AA|LK |
10 |0 |6 |10 |15 |22 |23 |31|
11 | PO | RS | me | sh | me | XO |Rc|
14 |0 |6 |11 |16 |21 |26 |27 31|
15 | PO | RT | RA | RB |bm |L | XO |
18 |0 |6 |9 |12 |15 |18 |21 |29 |31 |
19 | PO | BF | BFA| BFB| BFC| msk| TLI | XO |msk|
22 |0 |6 |11 |16 |20 |27 |30 |31 |
23 | PO | ///| ///| // | LEV | //| 1| / |
26 |0 |6 |9 |10 |11 |16 |31 |
31 | PO | BF | / | L | RA| SI |
32 | PO | BF | / | L | RA| UI |
38 |0 |6 |11 |16 |30 |31 |
39 | PO | RT | RA | DS | XO |
40 | PO | RS | RA | DS | XO |
41 | PO | RSp | RA | DS | XO |
42 | PO | FRTp | RA | DS | XO |
43 | PO | FRSp | RA | DS | XO |
46 |0 |6 |11 |16 |28|29 |31 |
47 | PO | RTp | RA | DQ | PT |
48 | PO | S | RA | DQ |SX| XO |
49 | PO | T | RA | DQ |TX| XO |
53 | PO | RT| d1| d0| XO|d2
54 | PO | FRS| d1| d0| XO|d2
57 |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 |
58 | PO | RT | RA | /// | XO | / |
59 | PO | RT | RA | RB | XO | / |
60 | PO | RT | RA | RB | XO |EH |
61 | PO | RT | RA | NB | XO | / |
62 | PO | RT | /|SR | /// | XO | / |
63 | PO | RT | /// | RB | XO | / |
64 | PO | RT | /// | RB | XO | 1 |
65 | PO | RT | /// | /// | XO | / |
66 | PO | RS | RA | RB | XO |Rc |
67 | PO | RT | RA | RB | XO |Rc |
68 | PO | RS | RA | RB | XO | 1 |
69 | PO | RS | RA | RB | XO | / |
70 | PO | RS | RA | NB | XO | / |
71 | PO | RS | RA | SH | XO |Rc |
72 | PO | RS | RA | /// | XO |Rc |
73 | PO | RS | RA | /// | XO | / |
74 | PO | RS | /|SR | /// | XO | / |
75 | PO | RS | /// | RB | XO | / |
76 | PO | RS | /// | /// | XO | / |
77 | PO | RS | /// |L1| /// | XO | / |
78 | PO | TH | RA | RB | XO | / |
79 | PO | BF |/ | L | RA | RB | XO | / |
80 | PO | BF |// | FRA | FRB | XO | / |
81 | PO | BF |// | BFA | // | /// | XO | / |
82 | PO | BF |// | /// |W | U |/ | XO |Rc |
83 | PO | BF |// | /// | /// | XO | / |
84 | PO | TH | RA | RB | XO | / |
85 | PO | /| CT | /// | /// | XO | / |
86 | PO | /| CT | RA | RB | XO | / |
87 | PO | /// | L2 | RA | RB | XO | / |
88 | PO | /// | L2 | /// | RB | XO | / |
89 | PO | /// | L2 | /// | /// | XO | / |
90 | PO | /// | L2 | /| E | /// | XO | / |
91 | PO | TO | RA | RB | XO | / |
92 | PO | FRT | RA | RB | XO | / |
93 | PO | FRT | FRA | FRB | XO | / |
94 | PO | FRTp | RA | RB | XO | / |
95 | PO | FRT | /// | FRB | XO |Rc |
96 | PO | FRT | /// | FRBp | XO |Rc |
97 | PO | FRT | /// | /// | XO |Rc |
98 | PO | FRTp | /// | FRB | XO |Rc |
99 | PO | FRTp | /// | FRBp | XO |Rc |
100 | PO | FRTp | FRA | FRBp | XO |Rc |
101 | PO | FRTp | FRAp | FRBp | XO |Rc |
102 | PO | BF |// | FRA | FRBp | XO | / |
103 | PO | BF |// | FRAp | FRBp | XO | / |
104 | PO | FRT |S | | FRB | XO |Rc |
105 | PO | FRTp |S | | FRBp | XO |Rc |
106 | PO | FRS | RA | RB | XO | / |
107 | PO | FRSp | RA | RB | XO | / |
108 | PO | BT | /// | /// | XO |Rc |
109 | PO | /// | RA | RB | XO | / |
110 | PO | /// | /// | RB | XO | / |
111 | PO | /// | /// | /// | XO | / |
112 | PO | /// | /// | E|/// | XO | / |
113 | PO | //|IH | /// | /// | XO | / |
114 | PO | A|// | /// | /// | XO | 1 |
115 | PO | A|// |R | /// | /// | XO | 1 |
116 | PO | /// | RA | RB | XO | 1 |
117 | PO | /// |WC | /// | /// | XO | / |
118 | PO | /// |T | RA | RB | XO | / |
119 | PO | VRT | RA | RB | XO | / |
120 | PO | VRS | RA | RB | XO | / |
121 | PO | MO | /// | /// | XO | / |
122 | PO | RT | /// |L3 | /// | XO | / |
125 |0 |6 |9 |11 |14 |16 |19|20|21 |31 |
126 | PO | BT | BA | BB | XO | / |
127 | PO | BO | BI | /// |BH | XO |LK |
128 | PO | | /// |S | XO | / |
129 | PO | BF |// |BFA |// | /// | XO | / |
130 | PO | /// | XO | / |
134 |0 |6 |11|12 |20|21 |31 |
135 | PO | RT | spr | XO | / |
136 | PO | RT | tbr | XO | / |
137 | PO | RT |0 | /// | XO | / |
138 | PO | RT |1 | FXM |/ | XO | / |
139 | PO | RT | dcr | XO | / |
140 | PO | RT | pmrn | XO | / |
141 | PO | RT | BHRBE | XO | / |
142 | PO | DUI | DUIS | XO | / |
143 | PO | RS |0 | FXM |/ | XO | / |
144 | PO | RS |1 | FXM |/ | XO | / |
145 | PO | RS | spr | XO | / |
146 | PO | RS | dcr | XO | / |
147 | PO | RS | pmrn | XO | / |
150 |0 |6|7 |15|16 |21 |31 |
151 | PO |L| FLM |W |FRB | XO |Rc |
154 |0 |6 |11 |16 |21 |31 |
155 | PO | T | RA | RB | XO |TX |
156 | PO | S | RA | RB | XO |SX |
159 |0 |6 |9 |11 |14 |16 |21 |30|31 |
160 | PO | T | /// | B |XO |BX|TX |
161 | PO | T | /// |UIM | B |XO |BX|TX |
162 | PO | BF | //| /// | B |XO |BX| / |
165 |0 |6 |9 |11 |16 |21 |22 |24 |29|30|31 |
166 | PO | T | A | B | XO |AX|BX|TX |
167 | PO | T | A | B |Rc | XO |AX|BX|TX |
168 | PO | BF | // | A | B | XO |AX|BX|/ |
169 | PO | T | A | B |XO |SHW | XO |AX|BX|TX |
170 | PO | T | A | B |XO |DM | XO |AX|BX|TX |
173 |0 |6 |11 |16 |21 |26 |28|29 |30|31 |
174 | PO | T | A | B | C | XO |CX|AX |BX|TX |
177 |0 |6 |11 |16 |21 |30|31 |
178 | PO | RS | RA | sh | XO |sh|Rc |
181 |0 |6 |11 |16 |22 |31 |
182 | PO | RT | RA | XBI | XO |Rc |
185 |0 |6 |11 |16 |21 |22 |31 |
186 | PO | RT| RA| RB |OE | XO |Rc |
187 | PO | RT| RA| RB | /| XO |Rc |
188 | PO | RT| RA| RB | /| XO | / |
189 | PO | RT| RA| /// |OE | XO |Rc |
192 |0 |6 |11 |16 |21 |26 |31 |
193 | PO | FRT | FRA | FRB | FRC | XO |Rc |
194 | PO | FRT | FRA | FRB | /// | XO |Rc |
195 | PO | FRT | FRA | /// | FRC | XO |Rc |
196 | PO | FRT | /// | FRB | /// | XO |Rc |
197 | PO | RT | RA | RB | BC | XO | /|
200 |0 |6 |11 |16 |21 |26 |31|
201 | PO | RS | RA | RB | MB | ME |Rc|
202 | PO | RS | RA | SH | MB | ME |Rc|
205 |0 |6 |11 |16 |21 |27|30|31|
206 | PO | RS | RA | sh | mb |XO|sh|Rc|
207 | PO | RS | RA | sh | me |XO|sh|Rc|
210 |0 |6 |11 |16 |21 |27 |31|
211 | PO | RS | RA | RB | mb | XO |Rc|
212 | PO | RS | RA | RB | me | XO |Rc|
215 |0 |6 |11 |16 |21|22 |25|26 |31|
216 | PO | RT | RA | RB | RC | XO |
217 | PO | VRT | VRA | VRB | VRC | XO |
218 | PO | VRT | VRA | VRB | /|SHB | XO |
219 | PO | VRT | VRA | VRB | /|BFA|/ | XO |
222 |0 |6 |11 |16 |21 |24|26 |31|
223 | PO | RT | RA | RB | RC | XO |Rc|
226 |0 |6 |11 |16 |21|22 |31|
227 | PO | VRT | VRA | VRB |Rc| XO |
230 |0 |6 |11 |16 |21 |31|
231 | PO | VRT | VRA | VRB | XO |
232 | PO | VRT | /// | VRB | XO |
233 | PO | VRT | UIM | VRB | XO |
234 | PO | VRT | / UIM | VRB | XO |
235 | PO | VRT | // UIM | VRB | XO |
236 | PO | VRT | /// UIM | VRB | XO |
237 | PO | VRT | SIM | ///| XO |
238 | PO | VRT | ///| | XO |
239 | PO | |/// | VRB | XO |
242 |0 |6 |9 |11 |16 |21 |31|
243 | PO | RS | RA | RB | XO |
244 | PO | RS | RA | UI | XO |
245 | PO | RT | ///| RB | XO |
246 | PO | RT | RA | RB | XO |
247 | PO | RT | RA | ///| XO |
248 | PO | RT | UI | RB | XO |
249 | PO | BF|//| RA | RB | XO |
250 | PO | RT | RA | UI | XO |
251 | PO | RT | SI | ///| XO |
254 |0 |6 |11 |16 |21 |29 |31 |
255 | PO | RT| RA | RB | XO |BFA |
258 |0 |6 |9 |11 |16 |22 |31 |
259 | PO | BF|//| FRA | DCM | XO | / |
260 | PO | BF|//| FRAp | DCM | XO | / |
261 | PO | BF|//| FRA | DGM | XO | / |
262 | PO | BF|//| FRAp | DGM | XO | / |
263 | PO | FRT | FRA | SH | XO |Rc |
264 | PO | FRTp| FRAp | SH | XO |Rc |
267 |0 |6 |11 |15 |16 |21 |23 |31 |
268 | PO | FRT | TE | FRB |RMC| XO |Rc |
269 | PO | FRTp| TE | FRBp |RMC| XO |Rc |
270 | PO | FRT | FRA | FRB |RMC| XO |Rc |
271 | PO | FRTp| FRA | FRBp |RMC| XO |Rc |
272 | PO | FRTp| FRAp | FRBp |RMC| XO |Rc |
273 | PO | FRT | /// | R | FRB |RMC| XO |Rc |
274 | PO | FRTp| /// | R | FRBp |RMC| XO |Rc |
277 |0 |6 |11 |16 |21 |23|24|25|26 31|
278 | PO | SVG|rmm | SVd |ew |yx|mm|sk| XO |
281 |0 |6 |11 |16 |23 |24 |25 |26 |31 |
282 | PO | RT | RA | SVi |ms |vs |vf | XO |Rc |
283 | PO | RT | / | SVi |/ |/ |vf | XO |Rc |
287 | PO | SCi | SCm | SCimm |
291 | PO | SCi | SCm | SRbr | SRimm |
294 |0 |6 |11 |16 |21 |31 |
295 | PO | RT | RA| RC | SVD |
296 | PO | RS | RA| RC | SVD |
297 | PO | FRT | RA| RC | SVD |
298 | PO | FRS | RA| RC | SVD |
301 |0 |6 |11 |16 |21 |30 |31 |
302 | PO | RT | RA | RC | SVDS | XO |
303 | PO | RS | RA | RC | SVDS | XO |
306 |0 |6 |11 |16 |21 |25 |26 |31 |
307 | PO | SVxd | SVyd | SVzd | SVrm |vf | XO |
310 |0 |6 |10|11 |16 |21 |24|25 |26 |31 |
311 | PO | offs |yx| rmm | SVd |XO |mm|sk | XO |
314 |0 |6 |11 |13 |15 |17 |19 |21 |22 |26 |31 |
315 | PO | SVme |mi0 | mi1 | mi2 | mo0 | mo1 |pst |/// | XO |
318 |0 |6 |11 |16 |21 |29 |31 |
319 | PO | RT | RA | RB | TLI | XO |Rc |
320 | PO | RT | RA | RB | TLI | XO |L |
322 # 1.6.28 Instruction Fields
324 Field used by the tbegin. instruction to specify an
325 implementation-specific function.
326 Field used by the tend. instruction to specify the
327 completion of the outer transaction and all nested
332 0 The immediate field represents an address
333 relative to the current instruction address. For
334 I-form branches the effective address of the
335 branch target is the sum of the LI field
336 sign-extended to 64 bits and the address of
337 the branch instruction. For B-form branches
338 the effective address of the branch target is
339 the sum of the BD field sign-extended to 64
340 bits and the address of the branch instruction.
341 1 The immediate field represents an absolute
342 address. For I-form branches the effective
343 address of the branch target is the LI field
344 sign-extended to 64 bits. For B-form branches
345 the effective address of the branch target is
346 the BD field sign-extended to 64 bits.
349 Fields that are concatenated to specify a VSR to
353 Field used to specify a bit in the CR to be used as
357 Field used to specify a bit in the CR to be used as
361 Field used to specify a bit in the CR to be used as
365 Immediate field used to specify a 14-bit signed
366 two's complement branch displacement which is
367 concatenated on the right with 0b00 and
368 sign-extended to 64 bits.
371 Field used to specify one of the CR fields or one of
372 the FPSCR fields to be used as a target.
373 Formats: D, X, XL, XX2, XX3, Z22
375 Field used to specify one of the CR fields
376 to be used as a source.
379 Field used to specify one of the CR fields or one of
380 the FPSCR fields to be used as a source.
383 Field used to specify one of the CR fields or one of
384 the FPSCR fields to be used as a source.
387 Field used to specify a hint in the Branch Condi-
388 tional to Link Register and Branch Conditional to
389 Count Register instructions. The encoding is
390 described in Section 2.4, 'Branch Instructions'.
393 Field used to identify the BHRB entry to be used
394 as a source by the Move From Branch History
395 Rolling Buffer instruction.
398 Field used to specify a bit in the CR to be tested by
399 a Branch Conditional instruction.
402 Field used to specify the Bit-mask Mode for bmask
405 Field used to specify options for the Branch Condi-
406 tional instructions. The encoding is described in
407 Section 2.4, 'Branch Instructions'.
408 Formats: B, XL, X, XL
410 Field used to specify a bit in the CR or in the
411 FPSCR to be used as a target.
414 Fields that are concatenated to specify a VSR to
416 Formats: XX2, XX3, XX4
418 Field used in X-form instructions to specify a cache
419 target (see Section 4.3.2 of Book II).
422 Fields that are concatenated to specify a VSR to
426 Immediate field used to specify a 16-bit signed
427 two's complement integer which is sign-extended
430 d0,d1,d2 (16:25,11:15,31)
431 Immediate fields that are concatenated to specify a
432 16-bit signed two's complement integer which is
433 sign-extended to 64 bits.
435 dc,dm,dx (25,29,11:15)
436 Immediate fields that are concatenated to specify
440 Immediate field used to specify Data Class Mask.
443 Immediate field used to specify Data Class Mask.
446 Immediate field used as the Data Group Mask.
449 Immediate field used by xxpermdi instruction as
450 doubleword permute control.
453 Immediate operand field used to specify new deci-
454 mal floating-point rounding mode.
457 Field used by the dnh instruction (see Book III-E).
460 Field used by the dnh instruction (see Book III-E).
463 Immediate field used to specify a 12-bit signed
464 two's complement integer which is concatenated
465 on the right with 0b0000 and sign-extended to 64
469 Immediate field used to specify a 14-bit signed
470 two's complement integer which is concatenated
471 on the right with 0b00 and sign-extended to 64 bits.
474 Field used by the Write MSR External Enable
475 instruction (see Book III-E).
478 Field used to specify the access types ordered by
479 an Elemental Memory Barrier type of sync instruc-
482 Field used to specify a hint in the Load and
483 Reserve instructions. The meaning is described in
484 Section 4.6.2, 'Load and Reserve and Store Con-
485 ditional Instructions', in Book II.
488 Expanded opcode field
491 Expanded opcode field
494 Field used to specify Inexact form of round to
495 quad-precision integer.
498 Field used to specify the element width for SVI-Form
501 Field used to specify the function code in Load/
502 Store Atomic instructions.
505 Field mask used to identify the FPSCR fields that
506 are to be updated by the mtfsf instruction.
509 Field used to specify a FPR to be used as a
511 Formats: A, X, Z22, Z23
513 Field used to specify an even/odd pair of FPRs to
514 be concatenated and used as a source.
517 Field used to specify an FPR to be used as a
519 Formats: A, X, XFL, Z23
521 Field used to specify an even/odd pair of FPRs to
522 be concatenated and used as a source.
525 Field used to specify an FPR to be used as a
529 Field used to specify an FPR to be used as a
533 Field used to specify an even/odd pair of FPRs to
534 be concatenated and used as a source.
537 Field used to specify an FPR to be used as a tar-
539 Formats: A, D, X, Z22, Z23
541 Field used to specify an even/odd pair of FPRs to
542 be concatenated and used as a target.
543 Formats: DS, X, Z22, Z23
545 Field mask used to identify the CR fields that are to
546 be written by the mtcrf and mtocrf instructions, or
547 read by the mfocrf instruction.
550 Immediate field used to specify a 5-bit signed inte-
554 Field used to specify a hint in the SLB Invalidate
555 All instruction. The meaning is described in
556 Section 5.9.3.2, 'SLB Management Instructions',
560 Immediate field used to specify an 8-bit integer.
563 Immediate field used to specify a 5-bit signed inte-
567 Field used to specify whether the mtfsf instruction
568 updates the entire FPSCR.
571 Field used by the Data Cache Block Flush instruc-
572 tion (see Section 4.3.2 of Book II) and also by the
573 Synchronize instruction (see Section 4.6.3 of Book
577 Field used to specify whether a fixed-point Com-
578 pare instruction is to compare 64-bit numbers or
580 Field used by the Compare Range Byte instruction
581 to indicate whether to compare against 1 or 2
585 Field used by the Move To Machine State Register
586 instruction (see Book III).
587 Field used by the SLB Move From Entry VSID and
588 SLB Move From Entry ESID instructions for imple-
589 mentation-specific purposes.
592 Field used by the Deliver A Random Number
593 instruction (see Section 3.3.9, 'Fixed-Point Arith-
594 metic Instructions') to choose the random number
598 Field used to specify whether mask-in occurs in bmask
601 Field used to specify whether the grevlut instruction
602 updates the whole GPR or the first half.
605 Field used by the System Call instructions.
608 Immediate field used to specify a 24-bit signed
609 two's complement integer which is concatenated
610 on the right with 0b00 and sign-extended to 64
615 0 Do not set the Link Register.
616 1 Set the Link Register. The address of the
617 instruction following the Branch instruction is
618 placed into the Link Register.
621 Field used to specify a REMAP shape for SVI-Form
624 Field used in M-form instructions to specify the first
625 1-bit of a 64-bit mask, as described in
626 Section 3.3.14, 'Fixed-Point Rotate and Shift
627 Instructions' on page 101.
630 Field used in MD-form and MDS-form instructions
631 to specify the first 1-bit of a 64-bit mask, as
632 described in Section 3.3.14, 'Fixed-Point Rotate
633 and Shift Instructions' on page 101.
636 Field used in MD-form and MDS-form instructions
637 to specify the last 1-bit of a 64-bit mask, as
638 described in Section 3.3.14, 'Fixed-Point Rotate
639 and Shift Instructions' on page 101.
642 Field used in M-form instructions to specify the last
643 1-bit of a 64-bit mask, as described in
644 Section 3.3.14, 'Fixed-Point Rotate and Shift
645 Instructions' on page 101.
648 Field used in REMAP to select the SVSHAPE for 1st input register
651 Field used in REMAP to select the SVSHAPE for 2nd input register
654 Field used in REMAP to select the SVSHAPE for 3rd input register
657 Field used to specify the meaning of the rmm field for SVI-Form
661 Field used in REMAP to select the SVSHAPE for 1st output register
664 Field used in REMAP to select the SVSHAPE for 2nd output register
667 Field used in X-form instructions to specify a sub-
668 set of storage accesses.
671 Field used in Simple-V to specify whether MVL is to be set
674 Field used to specify the number of bytes to move
675 in an immediate Move Assist instruction.
678 Field used by the svshape2 instruction as an offset
681 Field used by the Embedded Hypervisor Privilege
685 Field used by XO-form instructions to enable set-
686 ting OV and SO in the XER.
689 Primary opcode field.
692 Field used to specify whether to invalidate pro-
693 cess- or partition-scoped entries for tlbie[l].
696 Field used to specify preferred sign for BCD opera-
700 Field used in REMAP to indicate "persistence" mode (REMAP
701 continues to apply to multiple instructions)
704 Immediate field used to specify a 4-bit unsigned
708 Field used by the tbegin. instruction to specify the
712 Immediate field that specifies whether the RMC is
713 specifying the primary or secondary encoding
714 Field used to specify whether to invalidate Radix
715 Tree or HPT entries for tlbie[l].
718 Field used to specify a GPR to be used as a
719 source or as a target.
720 Formats: A, BM2, D, DQ, DQE, DS, M, MD, MDS, TX, VA, VA2, VX, X, XO, XS, SVL, XB
722 Field used to specify a GPR to be used as a
724 Formats: A, BM2, M, MDS, VA, VA2, X, XO
727 0 Do not alter the Condition Register.
728 1 Set Condition Register Field 6 as described in
729 Section 2.3.1, 'Condition Register' on
733 Field used to specify a GPR to be used as a
735 Formats: VA, VA2, SVD, SVDS
738 0 Do not alter the Condition Register.
739 1 Set Condition Register Field 0 or Field 1 as
740 described in Section 2.3.1, 'Condition Regis-
742 Formats: A, M, MD, MDS, VA2, X, XFL, XO, XS, Z22, Z23, SVL, XB, TLI
744 Field used to specify what types of entries to inval-
748 Immediate operand field used to specify new
749 binary floating-point rounding mode.
752 Immediate field used for DFP rounding mode con-
756 REMAP Mode field for SVI-Form and SVM2-Form
759 Round to Odd override
762 Field used to specify a GPR to be used as a
764 Formats: D, DS, M, MD, MDS, X, XFX, XS
766 Field used to specify an even/odd pair of GPRs to
767 be concatenated and used as a source.
770 Field used to specify a GPR to be used as a target.
771 Formats: A, BM2, D, DQE, DS, DX, VA, VA2, VX, X, XFX, XO, XX2, SVL, XB
773 Field used to specify an even/odd pair of GPRs to
774 be concatenated and used as a target.
777 Immediate field that specifies signed versus
781 Immediate field that specifies whether or not the
782 rfebb instruction re-enables event-based
786 Index to SV Context Propagation SPR
789 SV Context Propagation Mode
792 SV Context Propagation immediate bitfield
795 SV REMAP byte-reversal field.
798 SV REMAP immediate FIFO bitfield
801 Field used to specify a shift amount.
804 Field used to specify a shift amount.
807 Fields that are concatenated to specify a shift
811 Field used to specify a shift amount in bytes.
814 Field used to specify a shift amount in words.
817 Immediate field used to specify a 5-bit signed inte-
821 Immediate field used to specify a 16-bit signed
825 Immediate field used to specify a 5-bit signed inte-
829 Field used to specify dimensional skipping in svindex
832 Immediate field that specifies signed versus
836 Field used to specify a Special Purpose Register
837 for the mtspr and mfspr instructions.
840 Field used by the Segment Register Manipulation
841 instructions (see Book III).
844 Immediate field used to specify the size of the REMAP dimension
845 in the svindex and svshape2 instructions
848 Immediate field used to specify an 11-bit signed
849 two's complement integer which is sign-extended
853 Immediate field used to specify a 9-bit signed
854 two's complement integer which is concatenated
855 on the right with 0b00 and sign-extended to 64 bits.
858 Field used to specify a GPR to be used as a
862 Simple-V immediate field for setting VL or MVL
865 Simple-V "REMAP" map-enable bits (0-4)
868 Simple-V "REMAP" Mode
871 Simple-V "REMAP" x-dimension size
874 Simple-V "REMAP" y-dimension size
877 Simple-V "REMAP" z-dimension size
880 Fields SX and S are concatenated to specify a
881 VSR to be used as a source.
884 Fields SX and S are concatenated to specify a
885 VSR to be used as a source.
888 Field used to specify the type of invalidation done
889 by a TLB Invalidate Local instruction (see Book
893 Field used by the Move From Time Base instruc-
894 tion (see Section 6.1 of Book II).
897 Immediate field that specifies a DFP exponent.
900 Field used by the data stream variant of the dcbt
901 and dcbtst instructions (see Section 4.3.2 of Book
905 Field used by the ternlogi instruction as the
909 Field used to specify the conditions on which to
910 trap. The encoding is described in
911 Section 3.3.10.1, 'Character-Type Compare
912 Instructions' on page 87.
915 Fields that are concatenated to specify a VSR to
916 be used as either a target.
919 Fields that are concatenated to specify a VSR to
920 be used as either a target or a source.
921 Formats: X, XX2, XX3, XX4
923 Immediate field used as the data to be placed into
924 a field in the FPSCR.
927 Immediate field used to specify a 5-bit unsigned
931 Immediate field used to specify a 16-bit unsigned
935 Immediate field used to specify a 5-bit unsigned
939 Immediate field used to specify a 4-bit unsigned
943 Immediate field used to specify a 3-bit unsigned
947 Immediate field used to specify a 2-bit unsigned
951 Field used to specify a VR to be used as a source.
954 Field used to specify a VR to be used as a source.
957 Field used to specify a VR to be used as a source.
960 Field used to specify a VR to be used as a source.
963 Field used to specify a VR to be used as a target.
964 Formats: DS, VA, VC, VX, X
966 Field used in Simple-V to specify whether "Vertical" Mode is set
969 Field used in Simple-V to specify whether VL is to be set
972 Field used by the mtfsfi and mtfsf instructions to
973 specify the target word in the FPSCR.
976 Field used to specify the condition or conditions
977 that cause instruction execution to resume after
978 executing a wait instruction (see Section 4.6.4 of
982 Field used to specify a bit in the XER.
983 Formats: MDS, MDS, TX
985 Field used to specify a 6-bit unsigned immediate for bit manipulation
986 instructions, such as grevi.
989 Extended opcode field.
992 Extended opcode field.
995 Extended opcode field.
998 Extended opcode field.
1001 Extended opcode field.
1004 Extended opcode field.
1007 Extended opcode field.
1008 Formats: X, XFL, XFX, XL
1010 Extended opcode field.
1013 Extended opcode field.
1014 Formats: XO, XX3, Z22, XB
1016 Extended opcode field.
1019 Extended opcode field.
1022 Extended opcode field.
1025 Extended opcode field.
1028 Extended opcode field.
1029 Formats: A, DX, VA2, SVL
1031 Extended opcode field.
1032 Formats: VA, SVM, SVRM, SVI
1034 Extended opcode field.
1037 Extended opcode field.
1040 Extended opcode field.
1043 Extended opcode field.
1046 Extended opcode field.
1049 Extended opcode field.
1050 Formats: DQE, DS, SC
1052 Field used to specify loop dimension order in svindex
1055 Field used to specify loop dimension order in svshape2