7 | PO | BO| BI | BD |AA|LK |
10 |0 |6 |11 |16 |20 |27 |30 |31 |
11 | PO | ///| ///| // | LEV | //| 1| / |
14 |0 |6 |9 |10 |11 |16 |31 |
19 | PO | BF | / | L | RA| SI |
20 | PO | BF | / | L | RA| UI |
26 |0 |6 |11 |16 |30 |31 |
27 | PO | RT | RA | DS | XO |
28 | PO | RS | RA | DS | XO |
29 | PO | RSp | RA | DS | XO |
30 | PO | FRTp | RA | DS | XO |
31 | PO | FRSp | RA | DS | XO |
34 |0 |6 |11 |16 |28|29 |31 |
35 | PO | RTp | RA | DQ | PT |
36 | PO | S | RA | DQ |SX| XO |
37 | PO | T | RA | DQ |TX| XO |
40 |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 |
41 | PO | RT | RA | /// | XO | / |
42 | PO | RT | RA | RB | XO | / |
43 | PO | RT | RA | RB | XO |EH |
44 | PO | RT | RA | NB | XO | / |
45 | PO | RT | /|SR | /// | XO | / |
46 | PO | RT | /// | RB | XO | / |
47 | PO | RT | /// | RB | XO | 1 |
48 | PO | RT | /// | /// | XO | / |
49 | PO | RS | RA | RB | XO |Rc |
50 | PO | RT | RA | RB | XO |Rc |
51 | PO | RS | RA | RB | XO | 1 |
52 | PO | RS | RA | RB | XO | / |
53 | PO | RS | RA | NB | XO | / |
54 | PO | RS | RA | SH | XO |Rc |
55 | PO | RS | RA | /// | XO |Rc |
56 | PO | RS | RA | /// | XO | / |
57 | PO | RS | /|SR | /// | XO | / |
58 | PO | RS | /// | RB | XO | / |
59 | PO | RS | /// | /// | XO | / |
60 | PO | RS | /// |L1| /// | XO | / |
61 | PO | TH | RA | RB | XO | / |
62 | PO | BF |/ | L | RA | RB | XO | / |
63 | PO | BF |// | FRA | FRB | XO | / |
64 | PO | BF |// | BFA | // | /// | XO | / |
65 | PO | BF |// | /// |W | U |/ | XO |Rc |
66 | PO | BF |// | /// | /// | XO | / |
67 | PO | TH | RA | RB | XO | / |
68 | PO | /| CT | /// | /// | XO | / |
69 | PO | /| CT | RA | RB | XO | / |
70 | PO | /// | L2 | RA | RB | XO | / |
71 | PO | /// | L2 | /// | RB | XO | / |
72 | PO | /// | L2 | /// | /// | XO | / |
73 | PO | /// | L2 | /| E | /// | XO | / |
74 | PO | TO | RA | RB | XO | / |
75 | PO | FRT | RA | RB | XO | / |
76 | PO | FRT | FRA | FRB | XO | / |
77 | PO | FRTp | RA | RB | XO | / |
78 | PO | FRT | /// | FRB | XO |Rc |
79 | PO | FRT | /// | FRBp | XO |Rc |
80 | PO | FRT | /// | /// | XO |Rc |
81 | PO | FRTp | /// | FRB | XO |Rc |
82 | PO | FRTp | /// | FRBp | XO |Rc |
83 | PO | FRTp | FRA | FRBp | XO |Rc |
84 | PO | FRTp | FRAp | FRBp | XO |Rc |
85 | PO | BF |// | FRA | FRBp | XO | / |
86 | PO | BF |// | FRAp | FRBp | XO | / |
87 | PO | FRT |S | | FRB | XO |Rc |
88 | PO | FRTp |S | | FRBp | XO |Rc |
89 | PO | FRS | RA | RB | XO | / |
90 | PO | FRSp | RA | RB | XO | / |
91 | PO | BT | /// | /// | XO |Rc |
92 | PO | /// | RA | RB | XO | / |
93 | PO | /// | /// | RB | XO | / |
94 | PO | /// | /// | /// | XO | / |
95 | PO | /// | /// | E|/// | XO | / |
96 | PO | //|IH | /// | /// | XO | / |
97 | PO | A|// | /// | /// | XO | 1 |
98 | PO | A|// |R | /// | /// | XO | 1 |
99 | PO | /// | RA | RB | XO | 1 |
100 | PO | /// |WC | /// | /// | XO | / |
101 | PO | /// |T | RA | RB | XO | / |
102 | PO | VRT | RA | RB | XO | / |
103 | PO | VRS | RA | RB | XO | / |
104 | PO | MO | /// | /// | XO | / |
105 | PO | RT | /// |L3 | /// | XO | / |
108 |0 |6 |9 |11 |14 |16 |19|20|21 |31 |
109 | PO | BT | BA | BB | XO | / |
110 | PO | BO | BI | /// |BH | XO |LK |
111 | PO | | /// |S | XO | / |
112 | PO | BF |// |BFA |// | /// | XO | / |
113 | PO | /// | XO | / |
117 |0 |6 |11|12 |20|21 |31 |
118 | PO | RT | spr | XO | / |
119 | PO | RT | tbr | XO | / |
120 | PO | RT |0 | /// | XO | / |
121 | PO | RT |1 | FXM |/ | XO | / |
122 | PO | RT | dcr | XO | / |
123 | PO | RT | pmrn | XO | / |
124 | PO | RT | BHRBE | XO | / |
125 | PO | DUI | DUIS | XO | / |
126 | PO | RS |0 | FXM |/ | XO | / |
127 | PO | RS |1 | FXM |/ | XO | / |
128 | PO | RS | spr | XO | / |
129 | PO | RS | dcr | XO | / |
130 | PO | RS | pmrn | XO | / |
133 |0 |6|7 |15|16 |21 |31 |
134 | PO |L| FLM |W |FRB | XO |Rc |
137 |0 |6 |11 |16 |21 |31 |
138 | PO | T | RA | RB | XO |TX |
139 | PO | S | RA | RB | XO |SX |
142 |0 |6 |9 |11 |14 |16 |21 |30|31 |
143 | PO | T | /// | B |XO |BX|TX |
144 | PO | T | /// |UIM | B |XO |BX|TX |
145 | PO | BF | //| /// | B |XO |BX| / |
148 |0 |6 |9 |11 |16 |21 |22 |24 |29|30|31 |
149 | PO | T | A | B | XO |AX|BX|TX |
150 | PO | T | A | B |Rc | XO |AX|BX|TX |
151 | PO | BF | // | A | B | XO |AX|BX|/ |
152 | PO | T | A | B |XO |SHW | XO |AX|BX|TX |
153 | PO | T | A | B |XO |DM | XO |AX|BX|TX |
156 |0 |6 |11 |16 |21 |26 |28|29 |30|31 |
157 | PO | T | A | B | C | XO |CX|AX |BX|TX |
160 |0 |6 |11 |16 |21 |30|31 |
161 | PO | RS | RA | sh | XO |sh|Rc |
164 |0 |6 |11 |16 |22 |31 |
165 | PO | RT | RA | XBI | XO |Rc |
168 |0 |6 |11 |16 |21 |22 |31 |
169 | PO | RT| RA| RB |OE | XO |Rc |
170 | PO | RT| RA| RB | /| XO |Rc |
171 | PO | RT| RA| RB | /| XO | / |
172 | PO | RT| RA| /// |OE | XO |Rc |
175 |0 |6 |11 |16 |21 |26 |31 |
176 | PO | FRT | FRA | FRB | FRC | XO |Rc |
177 | PO | FRT | FRA | FRB | /// | XO |Rc |
178 | PO | FRT | FRA | /// | FRC | XO |Rc |
179 | PO | FRT | /// | FRB | /// | XO |Rc |
180 | PO | RT | RA | RB | BC | XO | /|
183 |0 |6 |11 |16 |21 |26 |31|
184 | PO | RS | RA | RB | MB | ME |Rc|
185 | PO | RS | RA | SH | MB | ME |Rc|
188 |0 |6 |11 |16 |21 |27|30|31|
189 | PO | RS | RA | sh | mb |XO|sh|Rc|
190 | PO | RS | RA | sh | me |XO|sh|Rc|
193 |0 |6 |11 |16 |21 |27 |31|
194 | PO | RS | RA | RB | mb | XO |Rc|
195 | PO | RS | RA | RB | me | XO |Rc|
198 |0 |6 |11 |16 |21|22 |26 |31|
199 | PO | RT | RA | RB | RC | XO |
200 | PO | VRT | VRA | VRB | VRC | XO |
201 | PO | VRT | VRA | VRB | /|SHB| XO |
204 |0 |6 |11 |16 |21|22 |31|
205 | PO | VRT | VRA | VRB |Rc| XO |
208 |0 |6 |11 |16 |21 |31|
209 | PO | VRT | VRA | VRB | XO |
210 | PO | VRT | /// | VRB | XO |
211 | PO | VRT | UIM | VRB | XO |
212 | PO | VRT | / UIM | VRB | XO |
213 | PO | VRT | // UIM | VRB | XO |
214 | PO | VRT | /// UIM | VRB | XO |
215 | PO | VRT | SIM | ///| XO |
216 | PO | VRT | ///| | XO |
217 | PO | |/// | VRB | XO |
220 |0 |6 |9 |11 |16 |21 |31|
221 | PO | RS | RA | RB | XO |
222 | PO | RS | RA | UI | XO |
223 | PO | RT | ///| RB | XO |
224 | PO | RT | RA | RB | XO |
225 | PO | RT | RA | ///| XO |
226 | PO | RT | UI | RB | XO |
227 | PO | BF|//| RA | RB | XO |
228 | PO | RT | RA | UI | XO |
229 | PO | RT | SI | ///| XO |
232 |0 |6 |11 |16 |21 |29 |31 |
233 | PO | RT| RA | RB | XO |BFA |
236 |0 |6 |9 |11 |16 |22 |31 |
237 | PO | BF|//| FRA | DCM | XO | / |
238 | PO | BF|//| FRAp | DCM | XO | / |
239 | PO | BF|//| FRA | DGM | XO | / |
240 | PO | BF|//| FRAp | DGM | XO | / |
241 | PO | FRT | FRA | SH | XO |Rc |
242 | PO | FRTp| FRAp | SH | XO |Rc |
245 |0 |6 |11 |15 |16 |21 |23 |31 |
246 | PO | FRT | TE | FRB |RMC| XO |Rc |
247 | PO | FRTp| TE | FRBp |RMC| XO |Rc |
248 | PO | FRT | FRA | FRB |RMC| XO |Rc |
249 | PO | FRTp| FRA | FRBp |RMC| XO |Rc |
250 | PO | FRTp| FRAp | FRBp |RMC| XO |Rc |
251 | PO | FRT | /// | R | FRB |RMC| XO |Rc |
252 | PO | FRTp| /// | R | FRBp |RMC| XO |Rc |
254 # V3.0B 1.6.6 DX-FORM
255 |0 |6 |11 |16 |26 |31
256 | PO | RT| d1| d0| XO|d2
259 |0 |6 |11 |16 |23 |24 |25 |26 |31 |
260 | PO | RT | RA | SVi |ms |vs |vf | XO |Rc |
264 | PO | SCi | SCm | SCimm |
268 | PO | SCi | SCm | SRbr | SRimm |
271 |0 |6 |11 |16 |21 |31 |
272 | PO | RT | RA| RC | SVD |
273 | PO | RS | RA| RC | SVD |
274 | PO | FRT | RA| RC | SVD |
275 | PO | FRS | RA| RC | SVD |
278 |0 |6 |11 |16 |21 |30 |31 |
279 | PO | RT | RA | RC | SVDS | XO |
280 | PO | RS | RA | RC | SVDS | XO |
283 |0 |6 |11 |16 |21 |25 |26 |31 |
284 | PO | SVxd | SVyd | SVzd | SVRM |vf | XO | / |
287 |0 |6 |11 |13 |15 |17 |19 |21 |22 |26 |31 |
288 | PO | SVme |mi0 | mi1 | mi2 | mo0 | mo1 |pst |/// | XO | / |
291 |0 |6 |11 |16 |21 |29 |
292 | PO | RT | RA | RB | TLI | XO |
294 # 1.6.28 Instruction Fields
296 Field used by the tbegin. instruction to specify an
297 implementation-specific function.
298 Field used by the tend. instruction to specify the
299 completion of the outer transaction and all nested
304 0 The immediate field represents an address
305 relative to the current instruction address. For
306 I-form branches the effective address of the
307 branch target is the sum of the LI field
308 sign-extended to 64 bits and the address of
309 the branch instruction. For B-form branches
310 the effective address of the branch target is
311 the sum of the BD field sign-extended to 64
312 bits and the address of the branch instruction.
313 1 The immediate field represents an absolute
314 address. For I-form branches the effective
315 address of the branch target is the LI field
316 sign-extended to 64 bits. For B-form branches
317 the effective address of the branch target is
318 the BD field sign-extended to 64 bits.
321 Fields that are concatenated to specify a VSR to
325 Field used to specify a bit in the CR to be used as
329 Field used to specify a bit in the CR to be used as
333 Field used to specify a bit in the CR to be used as
337 Immediate field used to specify a 14-bit signed
338 two's complement branch displacement which is
339 concatenated on the right with 0b00 and
340 sign-extended to 64 bits.
343 Field used to specify one of the CR fields or one of
344 the FPSCR fields to be used as a target.
345 Formats: D, X, XL, XX2, XX3, Z22
347 Field used to specify one of the CR fields or one of
348 the FPSCR fields to be used as a source.
351 Field used to specify one of the CR fields or one of
352 the FPSCR fields to be used as a source.
355 Field used to specify a hint in the Branch Condi-
356 tional to Link Register and Branch Conditional to
357 Count Register instructions. The encoding is
358 described in Section 2.4, 'Branch Instructions'.
361 Field used to identify the BHRB entry to be used
362 as a source by the Move From Branch History
363 Rolling Buffer instruction.
366 Field used to specify a bit in the CR to be tested by
367 a Branch Conditional instruction.
370 Field used to specify options for the Branch Condi-
371 tional instructions. The encoding is described in
372 Section 2.4, 'Branch Instructions'.
373 Formats: B, XL, X, XL
375 Field used to specify a bit in the CR or in the
376 FPSCR to be used as a target.
379 Fields that are concatenated to specify a VSR to
381 Formats: XX2, XX3, XX4
383 Field used in X-form instructions to specify a cache
384 target (see Section 4.3.2 of Book II).
387 Fields that are concatenated to specify a VSR to
391 Immediate field used to specify a 16-bit signed
392 two's complement integer which is sign-extended
395 d0,d1,d2 (16:25,11:15,31)
396 Immediate fields that are concatenated to specify a
397 16-bit signed two's complement integer which is
398 sign-extended to 64 bits.
400 dc,dm,dx (25,29,11:15)
401 Immediate fields that are concatenated to specify
405 Immediate field used to specify Data Class Mask.
408 Immediate field used to specify Data Class Mask.
411 Immediate field used as the Data Group Mask.
414 Immediate field used by xxpermdi instruction as
415 doubleword permute control.
418 Immediate operand field used to specify new deci-
419 mal floating-point rounding mode.
422 Field used by the dnh instruction (see Book III-E).
425 Field used by the dnh instruction (see Book III-E).
428 Immediate field used to specify a 12-bit signed
429 two's complement integer which is concatenated
430 on the right with 0b0000 and sign-extended to 64
434 Immediate field used to specify a 14-bit signed
435 two's complement integer which is concatenated
436 on the right with 0b00 and sign-extended to 64 bits.
439 Field used by the Write MSR External Enable
440 instruction (see Book III-E).
443 Field used to specify the access types ordered by
444 an Elemental Memory Barrier type of sync instruc-
447 Field used to specify a hint in the Load and
448 Reserve instructions. The meaning is described in
449 Section 4.6.2, 'Load and Reserve and Store Con-
450 ditional Instructions', in Book II.
453 Expanded opcode field
456 Expanded opcode field
459 Field used to specify Inexact form of round to
460 quad-precision integer.
463 Field used to specify the function code in Load/
464 Store Atomic instructions.
467 Field mask used to identify the FPSCR fields that
468 are to be updated by the mtfsf instruction.
471 Field used to specify a FPR to be used as a
473 Formats: A, X, Z22, Z23
475 Field used to specify an even/odd pair of FPRs to
476 be concatenated and used as a source.
479 Field used to specify an FPR to be used as a
481 Formats: A, X, XFL, Z23
483 Field used to specify an even/odd pair of FPRs to
484 be concatenated and used as a source.
487 Field used to specify an FPR to be used as a
491 Field used to specify an FPR to be used as a
495 Field used to specify an even/odd pair of FPRs to
496 be concatenated and used as a source.
499 Field used to specify an FPR to be used as a tar-
501 Formats: A, D, X, Z22, Z23
503 Field used to specify an even/odd pair of FPRs to
504 be concatenated and used as a target.
505 Formats: DS, X, Z22, Z23
507 Field mask used to identify the CR fields that are to
508 be written by the mtcrf and mtocrf instructions, or
509 read by the mfocrf instruction.
512 Immediate field used to specify a 5-bit signed inte-
516 Field used to specify a hint in the SLB Invalidate
517 All instruction. The meaning is described in
518 Section 5.9.3.2, 'SLB Management Instructions',
522 Immediate field used to specify an 8-bit integer.
525 Immediate field used to specify a 5-bit signed inte-
529 Field used to specify whether the mtfsf instruction
530 updates the entire FPSCR.
533 Field used by the Data Cache Block Flush instruc-
534 tion (see Section 4.3.2 of Book II) and also by the
535 Synchronize instruction (see Section 4.6.3 of Book
539 Field used to specify whether a fixed-point Com-
540 pare instruction is to compare 64-bit numbers or
542 Field used by the Compare Range Byte instruction
543 to indicate whether to compare against 1 or 2
547 Field used by the Move To Machine State Register
548 instruction (see Book III).
549 Field used by the SLB Move From Entry VSID and
550 SLB Move From Entry ESID instructions for imple-
551 mentation-specific purposes.
554 Field used by the Deliver A Random Number
555 instruction (see Section 3.3.9, 'Fixed-Point Arith-
556 metic Instructions') to choose the random number
560 Field used by the System Call instructions.
563 Immediate field used to specify a 24-bit signed
564 two's complement integer which is concatenated
565 on the right with 0b00 and sign-extended to 64
570 0 Do not set the Link Register.
571 1 Set the Link Register. The address of the
572 instruction following the Branch instruction is
573 placed into the Link Register.
576 Field used in M-form instructions to specify the first
577 1-bit of a 64-bit mask, as described in
578 Section 3.3.14, 'Fixed-Point Rotate and Shift
579 Instructions' on page 101.
582 Field used in MD-form and MDS-form instructions
583 to specify the first 1-bit of a 64-bit mask, as
584 described in Section 3.3.14, 'Fixed-Point Rotate
585 and Shift Instructions' on page 101.
588 Field used in MD-form and MDS-form instructions
589 to specify the last 1-bit of a 64-bit mask, as
590 described in Section 3.3.14, 'Fixed-Point Rotate
591 and Shift Instructions' on page 101.
594 Field used in M-form instructions to specify the last
595 1-bit of a 64-bit mask, as described in
596 Section 3.3.14, 'Fixed-Point Rotate and Shift
597 Instructions' on page 101.
600 Field used in REMAP to select the SVSHAPE for 1st input register
603 Field used in REMAP to select the SVSHAPE for 2nd input register
606 Field used in REMAP to select the SVSHAPE for 3rd input register
609 Field used in REMAP to select the SVSHAPE for 1st output register
612 Field used in REMAP to select the SVSHAPE for 2nd output register
615 Field used in X-form instructions to specify a sub-
616 set of storage accesses.
619 Field used in Simple-V to specify whether MVL is to be set
622 Field used to specify the number of bytes to move
623 in an immediate Move Assist instruction.
626 Field used by the Embedded Hypervisor Privilege
630 Field used by XO-form instructions to enable set-
631 ting OV and SO in the XER.
634 Primary opcode field.
637 Field used to specify whether to invalidate pro-
638 cess- or partition-scoped entries for tlbie[l].
641 Field used to specify preferred sign for BCD opera-
645 Field used in REMAP to indicate "persistence" mode (REMAP
646 continues to apply to multiple instructions)
649 Immediate field used to specify a 4-bit unsigned
653 Field used by the tbegin. instruction to specify the
657 Immediate field that specifies whether the RMC is
658 specifying the primary or secondary encoding
659 Field used to specify whether to invalidate Radix
660 Tree or HPT entries for tlbie[l].
663 Field used to specify a GPR to be used as a
664 source or as a target.
665 Formats: A, D, DQ, DQE, DS, M, MD, MDS, TX, VA, VX, X, XO, XS, SVL, XB
667 Field used to specify a GPR to be used as a
669 Formats: A, M, MDS, VA, X, XO
672 0 Do not alter the Condition Register.
673 1 Set Condition Register Field 6 as described in
674 Section 2.3.1, 'Condition Register' on
678 Field used to specify a GPR to be used as a
680 Formats: VA, SVD, SVDS
683 0 Do not alter the Condition Register.
684 1 Set Condition Register Field 0 or Field 1 as
685 described in Section 2.3.1, 'Condition Regis-
687 Formats: A, M, MD, MDS, X, XFL, XO, XS, Z22, Z23, SVL, XB
689 Field used to specify what types of entries to inval-
693 Immediate operand field used to specify new
694 binary floating-point rounding mode.
697 Immediate field used for DFP rounding mode con-
701 Round to Odd override
704 Field used to specify a GPR to be used as a
706 Formats: D, DS, M, MD, MDS, X, XFX, XS
708 Field used to specify an even/odd pair of GPRs to
709 be concatenated and used as a source.
712 Field used to specify a GPR to be used as a target.
713 Formats: A, D, DQE, DS, DX, VA, VX, X, XFX, XO, XX2, SVL, XB
715 Field used to specify an even/odd pair of GPRs to
716 be concatenated and used as a target.
719 Immediate field that specifies signed versus
723 Immediate field that specifies whether or not the
724 rfebb instruction re-enables event-based
728 Index to SV Context Propagation SPR
731 SV Context Propagation Mode
734 SV Context Propagation immediate bitfield
737 SV REMAP byte-reversal field.
740 SV REMAP immediate FIFO bitfield
743 Field used to specify a shift amount.
746 Field used to specify a shift amount.
749 Fields that are concatenated to specify a shift
753 Field used to specify a shift amount in bytes.
756 Field used to specify a shift amount in words.
759 Immediate field used to specify a 5-bit signed inte-
763 Immediate field used to specify a 16-bit signed
767 Immediate field used to specify a 5-bit signed inte-
771 Immediate field that specifies signed versus
775 Field used to specify a Special Purpose Register
776 for the mtspr and mfspr instructions.
779 Field used by the Segment Register Manipulation
780 instructions (see Book III).
783 Immediate field used to specify an 11-bit signed
784 two's complement integer which is sign-extended
788 Immediate field used to specify a 9-bit signed
789 two's complement integer which is concatenated
790 on the right with 0b00 and sign-extended to 64 bits.
793 Simple-V immediate field for setting VL or MVL
796 Simple-V "REMAP" map-enable bits (0-4)
799 Simple-V "REMAP" Mode
802 Simple-V "REMAP" x-dimension size
805 Simple-V "REMAP" y-dimension size
808 Simple-V "REMAP" z-dimension size
811 Fields SX and S are concatenated to specify a
812 VSR to be used as a source.
815 Fields SX and S are concatenated to specify a
816 VSR to be used as a source.
819 Field used to specify the type of invalidation done
820 by a TLB Invalidate Local instruction (see Book
824 Field used by the Move From Time Base instruc-
825 tion (see Section 6.1 of Book II).
828 Immediate field that specifies a DFP exponent.
831 Field used by the data stream variant of the dcbt
832 and dcbtst instructions (see Section 4.3.2 of Book
836 Field used by the ternlogi instruction as the
840 Field used to specify the conditions on which to
841 trap. The encoding is described in
842 Section 3.3.10.1, 'Character-Type Compare
843 Instructions' on page 87.
846 Fields that are concatenated to specify a VSR to
847 be used as either a target.
850 Fields that are concatenated to specify a VSR to
851 be used as either a target or a source.
852 Formats: X, XX2, XX3, XX4
854 Immediate field used as the data to be placed into
855 a field in the FPSCR.
858 Immediate field used to specify a 5-bit unsigned
862 Immediate field used to specify a 16-bit unsigned
866 Immediate field used to specify a 5-bit unsigned
870 Immediate field used to specify a 4-bit unsigned
874 Immediate field used to specify a 3-bit unsigned
878 Immediate field used to specify a 2-bit unsigned
882 Field used to specify a VR to be used as a source.
885 Field used to specify a VR to be used as a source.
888 Field used to specify a VR to be used as a source.
891 Field used to specify a VR to be used as a source.
894 Field used to specify a VR to be used as a target.
895 Formats: DS, VA, VC, VX, X
897 Field used in Simple-V to specify whether "Vertical" Mode is set
900 Field used in Simple-V to specify whether VL is to be set
903 Field used by the mtfsfi and mtfsf instructions to
904 specify the target word in the FPSCR.
907 Field used to specify the condition or conditions
908 that cause instruction execution to resume after
909 executing a wait instruction (see Section 4.6.4 of
913 Field used to specify a bit in the XER.
914 Formats: MDS, MDS, TX
916 Field used to specify a 6-bit unsigned immediate for bit manipulation
917 instructions, such as grevi.
920 Extended opcode field.
923 Extended opcode field.
926 Extended opcode field.
929 Extended opcode field.
932 Extended opcode field.
935 Extended opcode field.
936 Formats: X, XFL, XFX, XL
938 Extended opcode field.
941 Extended opcode field.
942 Formats: XO, XX3, Z22, XB
944 Extended opcode field.
947 Extended opcode field.
950 Extended opcode field.
953 Extended opcode field.
956 Extended opcode field.
959 Extended opcode field.
962 Extended opcode field.
965 Extended opcode field.
968 Extended opcode field.
971 Extended opcode field.
974 Extended opcode field.