6 HYPERRAM_DIR
=.
/hyperram_model
/s27kl0641
/model
8 QSPI_DIR
=.
/qspi_model
/Cy15b104qs
/model
/
10 FIRMWARE
=.
/coldboot
/coldboot.bin
12 # convert firmware to 32-bit hex
13 python3
scripts
/bin2hex.py
${FIRMWARE} 32 > firmware.hex
15 # create the build_simsoc/top.il file with firmware baked-in
16 python3 src
/ls2.py isim .
/coldboot
/coldboot.bin
18 # do some voodoo magic to get icarus to be happy with the ilang file
21 # fix a bug in Lattice ECP5 models
22 cp ${LIB_DIR}/DDRDLLA.v DDRDLLA.v
23 patch DDRDLLA.v
< DDRDLLA.
patch
25 # string together the icarus verilog files and start runnin
26 iverilog
-Wall -g2012 -s simsoc_hyperram_tb
-o simsoc \
27 src
/simsoc_hyperram_tb.v .
/top.v \
28 ${HYPERRAM_DIR}/s27kl0641.v \
29 ${LIB_DIR}/ECLKSYNCB.v
${LIB_DIR}/EHXPLLL.v \
30 ${LIB_DIR}/PUR.v
${LIB_DIR}/GSR.v \
31 ${LIB_DIR}/FD1S3AX.v ${LIB_DIR}/SGSR.v ${LIB_DIR}/ODDRX2F.v \
32 ${LIB_DIR}/ODDRX2DQA.v ${LIB_DIR}/DELAYF.v ${LIB_DIR}/BB.v \
33 ${LIB_DIR}/OB.v ${LIB_DIR}/IB.v ${LIB_DIR}/OBZ.v \
34 ${LIB_DIR}/DQSBUFM.v
${LIB_DIR}/UDFDL5_UDP_X.v \
35 ${LIB_DIR}/UDFDL5E_UDP_X.v \
36 ${LIB_DIR}/OFS1P3DX.v \
37 ${LIB_DIR}/IFS1P3DX.v \
38 ${LIB_DIR}/TSHX2DQSA.v
${LIB_DIR}/TSHX2DQA.v \
39 ${LIB_DIR}/ODDRX2DQSB.v
${LIB_DIR}/IDDRX2DQA.v \
41 -I ${QSPI_DIR} -DN25Q128A13E \
42 -Dmem_file_name=firmware.hex \
43 ${QSPI_DIR}/cy15b104qs.v \
45 vvp
-n simsoc
-fst-speed