software/bios/crt0.S

   1 /*
   2  * LatticeMico32 C startup code.
   3  *
   4  * Redistribution and use in source and binary forms, with or without
   5  * modification, are permitted provided that the following conditions
   6  * are met:
   7  * 1. Redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer.
   9  * 2. Redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution.
  12  *
  13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  16  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  23  * SUCH DAMAGE.
  24  */
  25
  26 /* Exception handlers - Must be 32 bytes long. */
  27 .section    .text, "ax", @progbits
  28 .global     _start
  29 _start:
  30 _reset_handler:
  31         xor     r0, r0, r0
  32         wcsr    IE, r0
  33         mvhi    r1, hi(_reset_handler)
  34         ori     r1, r1, lo(_reset_handler)
  35         wcsr    EBA, r1
  36         bi      _crt0
  37         nop
  38         nop
  39
  40 _breakpoint_handler:
  41         bi _breakpoint_handler
  42         nop
  43         nop
  44         nop
  45         nop
  46         nop
  47         nop
  48         nop
  49
  50 _instruction_bus_error_handler:
  51         bi _instruction_bus_error_handler
  52         nop
  53         nop
  54         nop
  55         nop
  56         nop
  57         nop
  58         nop
  59
  60 _watchpoint_hander:
  61         bi _watchpoint_hander
  62         nop
  63         nop
  64         nop
  65         nop
  66         nop
  67         nop
  68         nop
  69
  70 _data_bus_error_handler:
  71         bi _data_bus_error_handler
  72         nop
  73         nop
  74         nop
  75         nop
  76         nop
  77         nop
  78         nop
  79
  80 _divide_by_zero_handler:
  81         bi _divide_by_zero_handler
  82         nop
  83         nop
  84         nop
  85         nop
  86         nop
  87         nop
  88         nop
  89
  90 _interrupt_handler:
  91         sw      (sp+0), ra
  92         calli   .save_all
  93         calli   isr
  94         bi      .restore_all_and_eret
  95         nop
  96         nop
  97         nop
  98         nop
  99
 100 macaddress:
 101         .byte 0x10
 102         .byte 0xe2
 103         .byte 0xd5
 104         .byte 0x00
 105         .byte 0x00
 106         .byte 0x00
 107
 108         /* padding to align to a 32-bit boundary */
 109         .byte 0x00
 110         .byte 0x00
 111
 112 _crt0:
 113         /* Setup stack and global pointer */
 114         mvhi    sp, hi(_fstack)
 115         ori     sp, sp, lo(_fstack)
 116         mvhi    gp, hi(_gp)
 117         ori     gp, gp, lo(_gp)
 118
 119         /* Clear BSS */
 120         mvhi    r1, hi(_fbss)
 121         ori     r1, r1, lo(_fbss)
 122         mvhi    r3, hi(_ebss)
 123         ori     r3, r3, lo(_ebss)
 124 .clearBSS:
 125         be      r1, r3, .callMain
 126         sw      (r1+0), r0
 127         addi    r1, r1, 4
 128         bi      .clearBSS
 129
 130 .callMain:
 131         bi      main
 132
 133 .save_all:
 134         addi    sp, sp, -56
 135         sw      (sp+4), r1
 136         sw      (sp+8), r2
 137         sw      (sp+12), r3
 138         sw      (sp+16), r4
 139         sw      (sp+20), r5
 140         sw      (sp+24), r6
 141         sw      (sp+28), r7
 142         sw      (sp+32), r8
 143         sw      (sp+36), r9
 144         sw      (sp+40), r10
 145         sw      (sp+48), ea
 146         sw      (sp+52), ba
 147         /* ra needs to be moved from initial stack location */
 148         lw      r1, (sp+56)
 149         sw      (sp+44), r1
 150         ret
 151
 152 .restore_all_and_eret:
 153         lw      r1, (sp+4)
 154         lw      r2, (sp+8)
 155         lw      r3, (sp+12)
 156         lw      r4, (sp+16)
 157         lw      r5, (sp+20)
 158         lw      r6, (sp+24)
 159         lw      r7, (sp+28)
 160         lw      r8, (sp+32)
 161         lw      r9, (sp+36)
 162         lw      r10, (sp+40)
 163         lw      ra, (sp+44)
 164         lw      ea, (sp+48)
 165         lw      ba, (sp+52)
 166         addi    sp, sp, 56
 167         eret