src/bsv/peripheral_gen/quart.py

   1 from bsv.peripheral_gen.base import PBase
   2
   3 class quart(PBase):
   4
   5     def slowimport(self):
   6         return "    import Uart16550         :: *;"
   7
   8     def slowifdecl(self):
   9         return "            interface RS232_PHY_Ifc quart{0}_coe;\n" + \
  10                "            method Bit#(1) quart{0}_intr;"
  11
  12     def num_axi_regs32(self):
  13         return 8
  14
  15     def mkslow_peripheral(self, size=0):
  16         return "        Uart16550_AXI4_Lite_Ifc quart{0} <- \n" + \
  17                "                mkUart16550(clocked_by sp_clock,\n" + \
  18                "                    reset_by sp_reset, sp_clock, sp_reset);"
  19
  20     def _mk_connection(self, name=None, count=0):
  21         return "quart{0}.slave_axi_uart"
  22
  23     def pinname_out(self, pname):
  24         return {'tx' : 'coe_rs232.stx_out',
  25                 'rts': 'coe_rs232.rts_out',
  26                }.get(pname, '')
  27
  28     def pinname_in(self, pname):
  29         return {'rx': 'coe_rs232.srx_in',
  30                 'cts': 'coe_rs232.cts_in'
  31                }.get(pname, '')
  32
  33     def __disabled_mk_pincon(self, name, count):
  34         ret = [PBase.mk_pincon(self, name, count)]
  35         ret.append("    rule con_%s%d_io_in;" % (name, count))
  36         ret.append("       {0}{1}.coe_rs232.modem_input(".format(name, count))
  37         for idx, pname in enumerate(['rx', 'cts']):
  38             sname = self.peripheral.pname(pname).format(count)
  39             ps = "pinmux.peripheral_side.%s" % sname
  40             ret.append("            {0},".format(ps))
  41         ret.append("            1'b1,1'b0,1'b1")
  42         ret.append("        );")
  43         ret.append("    endrule")
  44
  45         return '\n'.join(ret)
  46
  47     def num_irqs(self):
  48         return 1
  49
  50     def plic_object(self, pname, idx):
  51         return "{0}_interrupt.read".format(pname)
  52
  53     def mk_plic(self, inum, irq_offs):
  54         name = self.get_iname(inum)
  55         ret = [uart_plic_template.format(name, irq_offs)]
  56         (ret2, irq_offs) = PBase.mk_plic(self, inum, irq_offs)
  57         ret.append(ret2)
  58         return ('\n'.join(ret), irq_offs)
  59
  60     def mk_ext_ifacedef(self, iname, inum):
  61         name = self.get_iname(inum)
  62         return "        method {0}_intr = {0}.irq;".format(name)
  63
  64     def slowifdeclmux(self):
  65         return "        method Bit#(1) {1}{0}_intr;"
  66
  67 uart_plic_template = """\
  68      // PLIC {0} synchronisation with irq {1}
  69      SyncBitIfc#(Bit#(1)) {0}_interrupt <-
  70                                 mkSyncBitToCC(sp_clock, uart_reset);
  71      rule plic_synchronize_{0}_interrupt_{1};
  72          {0}_interrupt.send({0}.irq);
  73      endrule
  74 """
  75