2 from copy
import deepcopy
6 def __init__(self
, name
):
9 def axibase(self
, name
, ifacenum
):
11 return "%(name)s%(ifacenum)dBase" % locals()
13 def axiend(self
, name
, ifacenum
):
15 return "%(name)s%(ifacenum)dEnd" % locals()
17 def axi_reg_def(self
, start
, name
, ifacenum
):
19 offs
= self
.num_axi_regs32() * 4 * 16
20 end
= start
+ offs
- 1
21 bname
= self
.axibase(name
, ifacenum
)
22 bend
= self
.axiend(name
, ifacenum
)
23 comment
= "%d 32-bit regs" % self
.num_axi_regs32()
24 return (" `define%(bname)s 'h%(start)08X\n"
25 " `define%(bend)s 'h%(end)08X // %(comment)s" % locals(),
28 def axi_slave_name(self
, name
, ifacenum
):
30 return "{0}{1}_slave_num".format(name
, ifacenum
)
32 def axi_slave_idx(self
, idx
, name
, ifacenum
):
33 name
= self
.axi_slave_name(name
, ifacenum
)
34 return ("typedef {0} {1};".format(idx
, name
), 1)
36 def axi_addr_map(self
, name
, ifacenum
):
37 bname
= self
.axibase(name
, ifacenum
)
38 bend
= self
.axiend(name
, ifacenum
)
39 name
= self
.axi_slave_name(name
, ifacenum
)
41 if(addr>=`{0} && addr<=`{1})
42 return tuple2(True,fromInteger(valueOf({2})));
43 else""".format(bname
, bend
, name
)
45 def mkslow_peripheral(self
):
48 def __mk_connection(self
, con
, aname
):
49 txt
= " mkConnection (slow_fabric.v_to_slaves\n" + \
50 " [fromInteger(valueOf({1}))],\n" + \
53 print "PBase __mk_connection", self
.name
, aname
56 return txt
.format(con
, aname
)
58 def mk_connection(self
, count
, name
=None):
61 print "PBase mk_conn", self
.name
, count
62 aname
= self
.axi_slave_name(name
, count
)
63 con
= self
._mk
_connection
(name
).format(count
, aname
)
64 return self
.__mk
_connection
(con
, aname
)
66 def _mk_connection(self
, name
=None):
73 return " import Uart16550 :: *;"
76 return " interface RS232_PHY_Ifc uart{0}_coe;\n" + \
77 " method Bit#(1) uart{0}_intr;"
79 def num_axi_regs32(self
):
82 def mkslow_peripheral(self
):
83 return " Uart16550_AXI4_Lite_Ifc uart{0} <- \n" + \
84 " mkUart16550(clocked_by uart_clock,\n" + \
85 " reset_by uart_reset, sp_clock, sp_reset);"
87 def _mk_connection(self
, name
=None):
88 return "uart{0}.slave_axi_uart"
95 return " import Uart_bs::*;\n" + \
96 " import RS232_modified::*;"
99 return " interface RS232 uart{0}_coe;"
101 def num_axi_regs32(self
):
104 def mkslow_peripheral(self
):
105 return " //Ifc_Uart_bs uart{0} <-" + \
106 " // mkUart_bs(clocked_by uart_clock,\n" + \
107 " // reset_by uart_reset,sp_clock, sp_reset);" +\
108 " Ifc_Uart_bs uart{0} <-" + \
109 " mkUart_bs(clocked_by sp_clock,\n" + \
110 " reset_by sp_reset, sp_clock, sp_reset);"
112 def _mk_connection(self
, name
=None):
113 return "uart{0}.slave_axi_uart"
118 def slowimport(self
):
119 return " import I2C_top :: *;"
121 def slowifdecl(self
):
122 return " interface I2C_out i2c{0}_out;\n" + \
123 " method Bit#(1) i2c{0}_isint;"
125 def num_axi_regs32(self
):
128 def mkslow_peripheral(self
):
129 return " I2C_IFC i2c{0} <- mkI2CController();"
131 def _mk_connection(self
, name
=None):
132 return "i2c{0}.slave_i2c_axi"
137 def slowimport(self
):
138 return " import qspi :: *;"
140 def slowifdecl(self
):
141 return " interface QSPI_out qspi{0}_out;\n" + \
142 " method Bit#(1) qspi{0}_isint;"
144 def num_axi_regs32(self
):
147 def mkslow_peripheral(self
):
148 return " Ifc_qspi qspi{0} <- mkqspi();"
150 def _mk_connection(self
, name
=None):
151 return "qspi{0}.slave"
156 def slowimport(self
):
157 return " import pwm::*;"
159 def slowifdecl(self
):
160 return " interface PWMIO pwm{0}_o;"
162 def num_axi_regs32(self
):
165 def mkslow_peripheral(self
):
166 return " Ifc_PWM_bus pwm{0}_bus <- mkPWM_bus(sp_clock);"
168 def _mk_connection(self
, name
=None):
169 return "pwm{0}_bus.axi4_slave"
174 def slowimport(self
):
175 return " import pinmux::*;\n" + \
176 " import mux::*;\n" + \
179 def slowifdecl(self
):
180 return " interface GPIO_config#({1}) pad_config{0};"
182 def num_axi_regs32(self
):
185 def axi_slave_idx(self
, idx
, name
, ifacenum
):
186 """ generates AXI slave number definition, except
187 GPIO also has a muxer per bank
190 (ret
, x
) = PBase
.axi_slave_idx(self
, idx
, name
, ifacenum
)
191 (ret2
, x
) = PBase
.axi_slave_idx(self
, idx
, "mux", ifacenum
)
192 return ("%s\n%s" % (ret
, ret2
), 2)
194 def mkslow_peripheral(self
):
195 return " MUX#(%(name)s) mux{0} <- mkmux();\n" + \
196 " GPIO#(%(name)s) gpio{0} <- mkgpio();" % \
199 def mk_connection(self
, count
):
200 print "GPIO mk_conn", self
.name
, count
202 for i
, n
in enumerate(['gpio', 'mux']):
203 res
.append(PBase
.mk_connection(self
, count
, n
))
204 return '\n'.join(res
)
206 def _mk_connection(self
, name
=None):
207 if name
.startswith('gpio'):
208 return "gpio{0}.axi_slave"
209 if name
.startswith('mux'):
210 return "mux{0}.axi_slave"
213 axi_slave_declarations
= """\
214 typedef 0 SlowMaster;
216 typedef TAdd#(LastGen_slave_num,`ifdef CLINT 1 `else 0 `endif )
218 typedef TAdd#(CLINT_slave_num ,`ifdef PLIC 1 `else 0 `endif )
220 typedef TAdd#(Plic_slave_num ,`ifdef AXIEXP 1 `else 0 `endif )
222 typedef TAdd#(AxiExp1_slave_num,1) Num_Slow_Slaves;
225 pinmux_cellrule
= """\
226 rule connect_select_lines_pinmux;
232 class CallFn(object):
233 def __init__(self
, peripheral
, name
):
234 self
.peripheral
= peripheral
237 def __call__(self
, *args
):
238 #print "__call__", self.name, self.peripheral.slow, args
239 if not self
.peripheral
.slow
:
241 return getattr(self
.peripheral
.slow
, self
.name
)(*args
[1:])
244 class PeripheralIface(object):
245 def __init__(self
, ifacename
):
247 slow
= slowfactory
.getcls(ifacename
)
248 print "Iface", ifacename
, slow
250 self
.slow
= slow(ifacename
)
251 for fname
in ['slowimport', 'slowifdecl', 'mkslow_peripheral',
253 fn
= CallFn(self
, fname
)
254 setattr(self
, fname
, types
.MethodType(fn
, self
))
256 #print "PeripheralIface"
259 def axi_reg_def(self
, start
, count
):
262 return self
.slow
.axi_reg_def(start
, self
.ifacename
, count
)
264 def axi_slave_idx(self
, start
, count
):
267 return self
.slow
.axi_slave_idx(start
, self
.ifacename
, count
)
269 def axi_addr_map(self
, count
):
272 return self
.slow
.axi_addr_map(self
.ifacename
, count
)
275 class PeripheralInterfaces(object):
279 def slowimport(self
, *args
):
281 for (name
, count
) in self
.ifacecount
:
282 #print "slowimport", name, self.data[name].slowimport
283 ret
.append(self
.data
[name
].slowimport())
284 return '\n'.join(list(filter(None, ret
)))
286 def slowifdecl(self
, *args
):
288 for (name
, count
) in self
.ifacecount
:
289 for i
in range(count
):
290 ret
.append(self
.data
[name
].slowifdecl().format(i
, name
))
291 return '\n'.join(list(filter(None, ret
)))
293 def axi_reg_def(self
, *args
):
295 start
= 0x00011100 # start of AXI peripherals address
296 for (name
, count
) in self
.ifacecount
:
297 for i
in range(count
):
298 x
= self
.data
[name
].axi_reg_def(start
, i
)
299 #print ("ifc", name, x)
303 return '\n'.join(list(filter(None, ret
)))
305 def axi_slave_idx(self
, *args
):
308 for (name
, count
) in self
.ifacecount
:
309 for i
in range(count
):
310 (rdef
, offs
) = self
.data
[name
].axi_slave_idx(start
, i
)
311 #print ("ifc", name, rdef, offs)
314 ret
.append("typedef %d LastGen_slave_num" % (start
- 1))
315 decls
= '\n'.join(list(filter(None, ret
)))
316 return axi_slave_declarations
.format(decls
)
318 def axi_addr_map(self
, *args
):
320 for (name
, count
) in self
.ifacecount
:
321 for i
in range(count
):
322 ret
.append(self
.data
[name
].axi_addr_map(i
))
323 return '\n'.join(list(filter(None, ret
)))
325 def mkslow_peripheral(self
, *args
):
327 for (name
, count
) in self
.ifacecount
:
328 for i
in range(count
):
329 x
= self
.data
[name
].mkslow_peripheral()
331 ret
.append(x
.format(i
))
332 return '\n'.join(list(filter(None, ret
)))
334 def mk_connection(self
, *args
):
336 for (name
, count
) in self
.ifacecount
:
337 for i
in range(count
):
338 print "mk_conn", name
, i
339 txt
= self
.data
[name
].mk_connection(i
)
342 print self
.data
[name
].mk_connection
344 return '\n'.join(list(filter(None, ret
)))
346 def mk_cellconn(self
):
348 txt
= " pinmux.mux_lines.cell{0}_mux(muxa.mux_config.mux[{0}]);"
349 for (name
, count
) in self
.ifacecount
:
350 for i
in range(count
):
351 ret
.append(txt
.format(i
))
352 ret
= '\n'.join(list(filter(None, ret
)))
353 return pinmux_cellrule
.format(ret
)
355 class PFactory(object):
356 def getcls(self
, name
):
357 for k
, v
in {'uart': uart
,
364 if name
.startswith(k
):
369 slowfactory
= PFactory()
371 if __name__
== '__main__':
375 i
= PeripheralIface('uart')
377 i
= PeripheralIface('gpioa')