src/bsv/peripheral_gen.py

   1 import types
   2 from copy import deepcopy
   3
   4
   5 class PBase(object):
   6     def __init__(self, name):
   7         self.name = name
   8
   9     def axibase(self, name, ifacenum):
  10         name = name.upper()
  11         return "%(name)s%(ifacenum)dBase" % locals()
  12
  13     def axiend(self, name, ifacenum):
  14         name = name.upper()
  15         return "%(name)s%(ifacenum)dEnd" % locals()
  16
  17     def axi_reg_def(self, start, name, ifacenum):
  18         name = name.upper()
  19         offs = self.num_axi_regs32() * 4 * 16
  20         end = start + offs - 1
  21         bname = self.axibase(name, ifacenum)
  22         bend = self.axiend(name, ifacenum)
  23         comment = "%d 32-bit regs" % self.num_axi_regs32()
  24         return ("    `define%(bname)s 'h%(start)08X\n"
  25                 "    `define%(bend)s  'h%(end)08X // %(comment)s" % locals(),
  26                 offs)
  27
  28     def axi_slave_name(self, name, ifacenum):
  29         name = name.upper()
  30         return "{0}{1}_slave_num".format(name, ifacenum)
  31
  32     def axi_slave_idx(self, idx, name, ifacenum):
  33         name = self.axi_slave_name(name, ifacenum)
  34         return ("typedef {0} {1};".format(idx, name), 1)
  35
  36     def axi_addr_map(self, name, ifacenum):
  37         bname = self.axibase(name, ifacenum)
  38         bend = self.axiend(name, ifacenum)
  39         name = self.axi_slave_name(name, ifacenum)
  40         return """\
  41         if(addr>=`{0} && addr<=`{1})
  42             return tuple2(True,fromInteger(valueOf({2})));
  43         else""".format(bname, bend, name)
  44
  45     def mk_pincon(self, name, count):
  46         ret = []
  47         for p in self.peripheral.pinspecs:
  48             typ = p['type']
  49             pname = p['name']
  50             #n = "{0}{1}".format(self.name, self.mksuffix(name, count))
  51             n = name#"{0}{1}".format(self.name, self.mksuffix(name, count))
  52             ret.append("    //%s %s" % (n, str(p)))
  53             sname = self.peripheral.pname(pname).format(count)
  54             ps = "pinmux.peripheral_side.%s" % sname
  55             if typ == 'out' or typ == 'inout':
  56                 ret.append("    rule con_%s%d_%s_out" % (name, count, pname))
  57                 fname = self.pinname_out(pname)
  58                 if fname:
  59                     ret.append("      {0}_out({1}.{2});".format(ps, n, fname))
  60                 fname = None
  61                 if p.get('outen'):
  62                     fname = self.pinname_outen(pname)
  63                 if fname:
  64                     fname = "{0}{1}.{2}".format(n, count, fname)
  65                     fname = self.pinname_tweak(pname, 'outen', fname)
  66                     ret.append("      {0}_outen({1});".format(ps, fname))
  67                 ret.append("    endrule")
  68             if typ == 'in' or typ == 'inout':
  69                 fname = self.pinname_in(pname)
  70                 if fname:
  71                     ret.append("    rule con_%s%d_%s_in" % (name, count, pname))
  72                     ret.append("      {1}.{2}({0}_in);".format(ps, n, fname))
  73                     ret.append("    endrule")
  74         return '\n'.join(ret)
  75
  76     def mk_cellconn(self, *args):
  77         return ''
  78
  79     def mkslow_peripheral(self):
  80         return ''
  81
  82     def mksuffix(self, name, i):
  83         return i
  84
  85     def __mk_connection(self, con, aname):
  86         txt =  "        mkConnection (slow_fabric.v_to_slaves\n" + \
  87                "                    [fromInteger(valueOf({1}))],\n" + \
  88                "                    {0});"
  89
  90         print "PBase __mk_connection", self.name, aname
  91         if not con:
  92             return ''
  93         return txt.format(con, aname)
  94
  95     def mk_connection(self, count, name=None):
  96         if name is None:
  97             name = self.name
  98         print "PBase mk_conn", self.name, count
  99         aname = self.axi_slave_name(name, count)
 100         #dname = self.mksuffix(name, count)
 101         #dname = "{0}{1}".format(name, dname)
 102         con = self._mk_connection(name, count).format(count, aname)
 103         return self.__mk_connection(con, aname)
 104
 105     def _mk_connection(self, name=None, count=0):
 106         return ''
 107
 108     def pinname_out(self, pname):
 109         return ''
 110
 111     def pinname_in(self, pname):
 112         return ''
 113
 114     def pinname_outen(self, pname):
 115         return ''
 116
 117     def pinname_tweak(self, pname, typ, txt):
 118         return txt
 119
 120 class uart(PBase):
 121
 122     def slowimport(self):
 123         return "          import Uart16550         :: *;"
 124
 125     def slowifdecl(self):
 126         return "            interface RS232_PHY_Ifc uart{0}_coe;\n" + \
 127                "            method Bit#(1) uart{0}_intr;"
 128
 129     def num_axi_regs32(self):
 130         return 8
 131
 132     def mkslow_peripheral(self):
 133         return "        Uart16550_AXI4_Lite_Ifc uart{0} <- \n" + \
 134                "                mkUart16550(clocked_by uart_clock,\n" + \
 135                "                    reset_by uart_reset, sp_clock, sp_reset);"
 136
 137     def _mk_connection(self, name=None, count=0):
 138         return "uart{0}.slave_axi_uart"
 139
 140     def pinname_out(self, pname):
 141         return {'tx': 'coe_rs232.sout'}.get(pname, '')
 142
 143     def pinname_in(self, pname):
 144         return {'rx': 'coe_rs232.sin'}.get(pname, '')
 145
 146
 147 class rs232(PBase):
 148
 149     def slowimport(self):
 150         return "        import Uart_bs::*;\n" + \
 151                "        import RS232_modified::*;"
 152
 153     def slowifdecl(self):
 154         return "            interface RS232 uart{0}_coe;"
 155
 156     def num_axi_regs32(self):
 157         return 2
 158
 159     def mkslow_peripheral(self):
 160         return "        //Ifc_Uart_bs uart{0} <-" + \
 161                "        //       mkUart_bs(clocked_by uart_clock,\n" + \
 162                "        //          reset_by uart_reset,sp_clock, sp_reset);" +\
 163                "        Ifc_Uart_bs uart{0} <-" + \
 164                "                mkUart_bs(clocked_by sp_clock,\n" + \
 165                "                    reset_by sp_reset, sp_clock, sp_reset);"
 166
 167     def _mk_connection(self, name=None, count=0):
 168         return "uart{0}.slave_axi_uart"
 169
 170     def pinname_out(self, pname):
 171         return {'tx': 'coe_rs232.sout'}.get(pname, '')
 172
 173     def pinname_in(self, pname):
 174         return {'rx': 'coe_rs232.sin'}.get(pname, '')
 175
 176
 177 class twi(PBase):
 178
 179     def slowimport(self):
 180         return "        import I2C_top           :: *;"
 181
 182     def slowifdecl(self):
 183         return "            interface I2C_out twi{0}_out;\n" + \
 184                "            method Bit#(1) twi{0}_isint;"
 185
 186     def num_axi_regs32(self):
 187         return 8
 188
 189     def mkslow_peripheral(self):
 190         return "        I2C_IFC twi{0} <- mkI2CController();"
 191
 192     def _mk_connection(self, name=None, count=0):
 193         return "twi{0}.slave_i2c_axi"
 194
 195     def pinname_out(self, pname):
 196         return {'sda': 'out.sda_out',
 197                 'scl': 'out.scl_out'}.get(pname, '')
 198
 199     def pinname_in(self, pname):
 200         return {'sda': 'out.sda_in',
 201                 'scl': 'out.scl_in'}.get(pname, '')
 202
 203     def pinname_outen(self, pname):
 204         return {'sda': 'out.sda_outen',
 205                 'scl': 'out.scl_outen'}.get(pname, '')
 206
 207     def pinname_tweak(self, pname, typ, txt):
 208         if typ == 'outen':
 209             return "pack({0})".format(txt)
 210         return txt
 211
 212
 213 class qspi(PBase):
 214
 215     def slowimport(self):
 216         return "        import qspi              :: *;"
 217
 218     def slowifdecl(self):
 219         return "            interface QSPI_out qspi{0}_out;\n" + \
 220                "            method Bit#(1) qspi{0}_isint;"
 221
 222     def num_axi_regs32(self):
 223         return 13
 224
 225     def mkslow_peripheral(self):
 226         return "        Ifc_qspi qspi{0} <-  mkqspi();"
 227
 228     def _mk_connection(self, name=None, count=0):
 229         return "qspi{0}.slave"
 230
 231
 232 class pwm(PBase):
 233
 234     def slowimport(self):
 235         return "        import pwm::*;"
 236
 237     def slowifdecl(self):
 238         return "        interface PWMIO pwm{0}_o;"
 239
 240     def num_axi_regs32(self):
 241         return 4
 242
 243     def mkslow_peripheral(self):
 244         return "        Ifc_PWM_bus pwm{0}_bus <- mkPWM_bus(sp_clock);"
 245
 246     def _mk_connection(self, name=None, count=0):
 247         return "pwm{0}_bus.axi4_slave"
 248
 249
 250 class gpio(PBase):
 251
 252     def slowimport(self):
 253         return "     import pinmux::*;\n" + \
 254                "     import mux::*;\n" + \
 255                "     import gpio::*;\n"
 256
 257     def slowifdecl(self):
 258         return "        interface GPIO_config#({1}) pad_config{0};"
 259
 260     def num_axi_regs32(self):
 261         return 2
 262
 263     def axi_slave_idx(self, idx, name, ifacenum):
 264         """ generates AXI slave number definition, except
 265             GPIO also has a muxer per bank
 266         """
 267         name = name.upper()
 268         (ret, x) = PBase.axi_slave_idx(self, idx, name, ifacenum)
 269         (ret2, x) = PBase.axi_slave_idx(self, idx, "mux", ifacenum)
 270         return ("%s\n%s" % (ret, ret2), 2)
 271
 272     def mkslow_peripheral(self):
 273         return "        MUX#(%(name)s) mux{0} <- mkmux();\n" + \
 274                "        GPIO#(%(name)s) gpio{0} <- mkgpio();" % \
 275                     {'name': self.name}
 276
 277     def mk_connection(self, count):
 278         print "GPIO mk_conn", self.name, count
 279         res = []
 280         dname = self.mksuffix(self.name, count)
 281         for i, n in enumerate(['gpio' + dname, 'mux' + dname]):
 282             res.append(PBase.mk_connection(self, count, n))
 283         return '\n'.join(res)
 284
 285     def _mk_connection(self, name=None, count=0):
 286         n = self.mksuffix(name, count)
 287         if name.startswith('gpio'):
 288             return "gpio{0}.axi_slave".format(n)
 289         if name.startswith('mux'):
 290             return "mux{0}.axi_slave".format(n)
 291
 292     def mksuffix(self, name, i):
 293         if name.startswith('mux'):
 294             return name[3:]
 295         return name[4:]
 296
 297     def mk_cellconn(self, cellnum, name, count):
 298         ret = []
 299         bank = self.mksuffix(name, count)
 300         txt = "       pinmux.mux_lines.cell{0}_mux(mux{1}.mux_config.mux[{2}]);"
 301         for p in self.peripheral.pinspecs:
 302             ret.append(txt.format(cellnum, bank, p['name'][1:]))
 303             cellnum += 1
 304         return ("\n".join(ret), cellnum)
 305
 306     def pinname_out(self, pname):
 307         return "func.gpio_out[{0}]".format(pname[1:])
 308
 309     def pinname_outen(self, pname):
 310         return {'sda': 'out.sda_outen',
 311                 'scl': 'out.scl_outen'}.get(pname, '')
 312
 313     def mk_pincon(self, name, count):
 314         ret = [PBase.mk_pincon(self, name, count)]
 315         # special-case for gpio in, store in a temporary vector
 316         plen = len(self.peripheral.pinspecs)
 317         ret.append("    rule con_%s%d_in" % (name, count))
 318         ret.append("       Vector#({0},Bit#(1)) temp;".format(plen))
 319         for p in self.peripheral.pinspecs:
 320             typ = p['type']
 321             pname = p['name']
 322             idx = pname[1:]
 323             n = name
 324             sname = self.peripheral.pname(pname).format(count)
 325             ps = "pinmux.peripheral_side.%s_in" % sname
 326             ret.append("        temp[{0}]={1};".format(idx, ps))
 327         ret.append("        {0}.func.gpio_in(temp);".format(name))
 328         ret.append("    endrule")
 329         return '\n'.join(ret)
 330
 331
 332 axi_slave_declarations = """\
 333 typedef  0  SlowMaster;
 334 {0}
 335 typedef  TAdd#(LastGen_slave_num,`ifdef CLINT       1 `else 0 `endif )
 336               CLINT_slave_num;
 337 typedef  TAdd#(CLINT_slave_num  ,`ifdef PLIC        1 `else 0 `endif )
 338               Plic_slave_num;
 339 typedef  TAdd#(Plic_slave_num   ,`ifdef AXIEXP      1 `else 0 `endif )
 340               AxiExp1_slave_num;
 341 typedef TAdd#(AxiExp1_slave_num,1) Num_Slow_Slaves;
 342 """
 343
 344 pinmux_cellrule = """\
 345     rule connect_select_lines_pinmux;
 346 {0}
 347     endrule
 348 """
 349
 350
 351 class CallFn(object):
 352     def __init__(self, peripheral, name):
 353         self.peripheral = peripheral
 354         self.name = name
 355
 356     def __call__(self, *args):
 357         #print "__call__", self.name, self.peripheral.slow, args
 358         if not self.peripheral.slow:
 359             return ''
 360         return getattr(self.peripheral.slow, self.name)(*args[1:])
 361
 362
 363 class PeripheralIface(object):
 364     def __init__(self, ifacename):
 365         self.slow = None
 366         slow = slowfactory.getcls(ifacename)
 367         print "Iface", ifacename, slow
 368         if slow:
 369             self.slow = slow(ifacename)
 370             self.slow.peripheral = self
 371         for fname in ['slowimport', 'slowifdecl', 'mkslow_peripheral',
 372                       'mk_connection', 'mk_cellconn', 'mk_pincon']:
 373             fn = CallFn(self, fname)
 374             setattr(self, fname, types.MethodType(fn, self))
 375
 376         #print "PeripheralIface"
 377         #print dir(self)
 378
 379     def mksuffix(self, name, i):
 380         if self.slow is None:
 381             return i
 382         return self.slow.mksuffix(name, i)
 383
 384     def axi_reg_def(self, start, count):
 385         if not self.slow:
 386             return ('', 0)
 387         return self.slow.axi_reg_def(start, self.ifacename, count)
 388
 389     def axi_slave_idx(self, start, count):
 390         if not self.slow:
 391             return ('', 0)
 392         return self.slow.axi_slave_idx(start, self.ifacename, count)
 393
 394     def axi_addr_map(self, count):
 395         if not self.slow:
 396             return ''
 397         return self.slow.axi_addr_map(self.ifacename, count)
 398
 399
 400 class PeripheralInterfaces(object):
 401     def __init__(self):
 402         pass
 403
 404     def slowimport(self, *args):
 405         ret = []
 406         for (name, count) in self.ifacecount:
 407             #print "slowimport", name, self.data[name].slowimport
 408             ret.append(self.data[name].slowimport())
 409         return '\n'.join(list(filter(None, ret)))
 410
 411     def slowifdecl(self, *args):
 412         ret = []
 413         for (name, count) in self.ifacecount:
 414             for i in range(count):
 415                 ret.append(self.data[name].slowifdecl().format(i, name))
 416         return '\n'.join(list(filter(None, ret)))
 417
 418     def axi_reg_def(self, *args):
 419         ret = []
 420         start = 0x00011100  # start of AXI peripherals address
 421         for (name, count) in self.ifacecount:
 422             for i in range(count):
 423                 x = self.data[name].axi_reg_def(start, i)
 424                 #print ("ifc", name, x)
 425                 (rdef, offs) = x
 426                 ret.append(rdef)
 427                 start += offs
 428         return '\n'.join(list(filter(None, ret)))
 429
 430     def axi_slave_idx(self, *args):
 431         ret = []
 432         start = 0
 433         for (name, count) in self.ifacecount:
 434             for i in range(count):
 435                 (rdef, offs) = self.data[name].axi_slave_idx(start, i)
 436                 #print ("ifc", name, rdef, offs)
 437                 ret.append(rdef)
 438                 start += offs
 439         ret.append("typedef %d LastGen_slave_num" % (start - 1))
 440         decls = '\n'.join(list(filter(None, ret)))
 441         return axi_slave_declarations.format(decls)
 442
 443     def axi_addr_map(self, *args):
 444         ret = []
 445         for (name, count) in self.ifacecount:
 446             for i in range(count):
 447                 ret.append(self.data[name].axi_addr_map(i))
 448         return '\n'.join(list(filter(None, ret)))
 449
 450     def mkslow_peripheral(self, *args):
 451         ret = []
 452         for (name, count) in self.ifacecount:
 453             for i in range(count):
 454                 print "mkslow", name, count
 455                 x = self.data[name].mkslow_peripheral()
 456                 print name, count, x
 457                 suffix = self.data[name].mksuffix(name, i)
 458                 ret.append(x.format(suffix))
 459         return '\n'.join(list(filter(None, ret)))
 460
 461     def mk_connection(self, *args):
 462         ret = []
 463         for (name, count) in self.ifacecount:
 464             for i in range(count):
 465                 print "mk_conn", name, i
 466                 txt = self.data[name].mk_connection(i)
 467                 if name == 'gpioa':
 468                     print "txt", txt
 469                     print self.data[name].mk_connection
 470                 ret.append(txt)
 471         return '\n'.join(list(filter(None, ret)))
 472
 473     def mk_cellconn(self):
 474         ret = []
 475         cellcount = 0
 476         for (name, count) in self.ifacecount:
 477             for i in range(count):
 478                 res = self.data[name].mk_cellconn(cellcount, name, i)
 479                 if not res:
 480                     continue
 481                 (txt, cellcount) = res
 482                 ret.append(txt)
 483         ret = '\n'.join(list(filter(None, ret)))
 484         return pinmux_cellrule.format(ret)
 485
 486     def mk_pincon(self):
 487         ret = []
 488         for (name, count) in self.ifacecount:
 489             for i in range(count):
 490                 txt = self.data[name].mk_pincon(name, i)
 491                 ret.append(txt)
 492         return '\n'.join(list(filter(None, ret)))
 493
 494 class PFactory(object):
 495     def getcls(self, name):
 496         for k, v in {'uart': uart,
 497                 'rs232': rs232,
 498                 'twi': twi,
 499                 'qspi': qspi,
 500                 'pwm': pwm,
 501                 'gpio': gpio
 502                 }.items():
 503             if name.startswith(k):
 504                 return v
 505         return None
 506
 507
 508 slowfactory = PFactory()
 509
 510 if __name__ == '__main__':
 511     p = uart('uart')
 512     print p.slowimport()
 513     print p.slowifdecl()
 514     i = PeripheralIface('uart')
 515     print i, i.slow
 516     i = PeripheralIface('gpioa')
 517     print i, i.slow