src/bsv/peripheral_gen.py

   1 import types
   2 from copy import deepcopy
   3
   4
   5 class PBase(object):
   6     def __init__(self, name):
   7         self.name = name
   8
   9     def axibase(self, name, ifacenum):
  10         name = name.upper()
  11         return "%(name)s%(ifacenum)dBase" % locals()
  12
  13     def axiend(self, name, ifacenum):
  14         name = name.upper()
  15         return "%(name)s%(ifacenum)dEnd" % locals()
  16
  17     def axi_reg_def(self, start, name, ifacenum):
  18         name = name.upper()
  19         offs = self.num_axi_regs32() * 4 * 16
  20         end = start + offs - 1
  21         bname = self.axibase(name, ifacenum)
  22         bend = self.axiend(name, ifacenum)
  23         comment = "%d 32-bit regs" % self.num_axi_regs32()
  24         return ("    `define%(bname)s 'h%(start)08X\n"
  25                 "    `define%(bend)s  'h%(end)08X // %(comment)s" % locals(),
  26                 offs)
  27
  28     def axi_slave_name(self, name, ifacenum):
  29         name = name.upper()
  30         return "{0}{1}_slave_num".format(name, ifacenum)
  31
  32     def axi_slave_idx(self, idx, name, ifacenum):
  33         name = self.axi_slave_name(name, ifacenum)
  34         return ("typedef {0} {1};".format(idx, name), 1)
  35
  36     def axi_addr_map(self, name, ifacenum):
  37         bname = self.axibase(name, ifacenum)
  38         bend = self.axiend(name, ifacenum)
  39         name = self.axi_slave_name(name, ifacenum)
  40         return """\
  41         if(addr>=`{0} && addr<=`{1})
  42             return tuple2(True,fromInteger(valueOf({2})));
  43         else""".format(bname, bend, name)
  44
  45     def mk_cellconn(self, *args):
  46         return ''
  47
  48     def mkslow_peripheral(self):
  49         return ''
  50
  51     def mksuffix(self, name, i):
  52         return i
  53
  54     def __mk_connection(self, con, aname):
  55         txt =  "        mkConnection (slow_fabric.v_to_slaves\n" + \
  56                "                    [fromInteger(valueOf({1}))],\n" + \
  57                "                    {0});"
  58
  59         print "PBase __mk_connection", self.name, aname
  60         if not con:
  61             return ''
  62         return txt.format(con, aname)
  63
  64     def mk_connection(self, count, name=None):
  65         if name is None:
  66             name = self.name
  67         print "PBase mk_conn", self.name, count
  68         aname = self.axi_slave_name(name, count)
  69         #dname = self.mksuffix(name, count)
  70         #dname = "{0}{1}".format(name, dname)
  71         con = self._mk_connection(name, count).format(count, aname)
  72         return self.__mk_connection(con, aname)
  73
  74     def _mk_connection(self, name=None, count=0):
  75         return ''
  76
  77
  78 class uart(PBase):
  79
  80     def slowimport(self):
  81         return "          import Uart16550         :: *;"
  82
  83     def slowifdecl(self):
  84         return "            interface RS232_PHY_Ifc uart{0}_coe;\n" + \
  85                "            method Bit#(1) uart{0}_intr;"
  86
  87     def num_axi_regs32(self):
  88         return 8
  89
  90     def mkslow_peripheral(self):
  91         return "        Uart16550_AXI4_Lite_Ifc uart{0} <- \n" + \
  92                "                mkUart16550(clocked_by uart_clock,\n" + \
  93                "                    reset_by uart_reset, sp_clock, sp_reset);"
  94
  95     def _mk_connection(self, name=None, count=0):
  96         return "uart{0}.slave_axi_uart"
  97
  98
  99
 100 class rs232(PBase):
 101
 102     def slowimport(self):
 103         return "        import Uart_bs::*;\n" + \
 104                "        import RS232_modified::*;"
 105
 106     def slowifdecl(self):
 107         return "            interface RS232 uart{0}_coe;"
 108
 109     def num_axi_regs32(self):
 110         return 2
 111
 112     def mkslow_peripheral(self):
 113         return "        //Ifc_Uart_bs uart{0} <-" + \
 114                "        //       mkUart_bs(clocked_by uart_clock,\n" + \
 115                "        //          reset_by uart_reset,sp_clock, sp_reset);" +\
 116                "        Ifc_Uart_bs uart{0} <-" + \
 117                "                mkUart_bs(clocked_by sp_clock,\n" + \
 118                "                    reset_by sp_reset, sp_clock, sp_reset);"
 119
 120     def _mk_connection(self, name=None, count=0):
 121         return "uart{0}.slave_axi_uart"
 122
 123
 124 class twi(PBase):
 125
 126     def slowimport(self):
 127         return "        import I2C_top           :: *;"
 128
 129     def slowifdecl(self):
 130         return "            interface I2C_out i2c{0}_out;\n" + \
 131                "            method Bit#(1) i2c{0}_isint;"
 132
 133     def num_axi_regs32(self):
 134         return 8
 135
 136     def mkslow_peripheral(self):
 137         return "        I2C_IFC i2c{0} <- mkI2CController();"
 138
 139     def _mk_connection(self, name=None, count=0):
 140         return "i2c{0}.slave_i2c_axi"
 141
 142
 143 class qspi(PBase):
 144
 145     def slowimport(self):
 146         return "        import qspi              :: *;"
 147
 148     def slowifdecl(self):
 149         return "            interface QSPI_out qspi{0}_out;\n" + \
 150                "            method Bit#(1) qspi{0}_isint;"
 151
 152     def num_axi_regs32(self):
 153         return 13
 154
 155     def mkslow_peripheral(self):
 156         return "        Ifc_qspi qspi{0} <-  mkqspi();"
 157
 158     def _mk_connection(self, name=None, count=0):
 159         return "qspi{0}.slave"
 160
 161
 162 class pwm(PBase):
 163
 164     def slowimport(self):
 165         return "        import pwm::*;"
 166
 167     def slowifdecl(self):
 168         return "        interface PWMIO pwm{0}_o;"
 169
 170     def num_axi_regs32(self):
 171         return 4
 172
 173     def mkslow_peripheral(self):
 174         return "        Ifc_PWM_bus pwm{0}_bus <- mkPWM_bus(sp_clock);"
 175
 176     def _mk_connection(self, name=None, count=0):
 177         return "pwm{0}_bus.axi4_slave"
 178
 179
 180 class gpio(PBase):
 181
 182     def slowimport(self):
 183         return "     import pinmux::*;\n" + \
 184                "     import mux::*;\n" + \
 185                "     import gpio::*;\n"
 186
 187     def slowifdecl(self):
 188         return "        interface GPIO_config#({1}) pad_config{0};"
 189
 190     def num_axi_regs32(self):
 191         return 2
 192
 193     def axi_slave_idx(self, idx, name, ifacenum):
 194         """ generates AXI slave number definition, except
 195             GPIO also has a muxer per bank
 196         """
 197         name = name.upper()
 198         (ret, x) = PBase.axi_slave_idx(self, idx, name, ifacenum)
 199         (ret2, x) = PBase.axi_slave_idx(self, idx, "mux", ifacenum)
 200         return ("%s\n%s" % (ret, ret2), 2)
 201
 202     def mkslow_peripheral(self):
 203         return "        MUX#(%(name)s) mux{0} <- mkmux();\n" + \
 204                "        GPIO#(%(name)s) gpio{0} <- mkgpio();" % \
 205                     {'name': self.name}
 206
 207     def mk_connection(self, count):
 208         print "GPIO mk_conn", self.name, count
 209         res = []
 210         dname = self.mksuffix(self.name, count)
 211         for i, n in enumerate(['gpio' + dname, 'mux' + dname]):
 212             res.append(PBase.mk_connection(self, count, n))
 213         return '\n'.join(res)
 214
 215     def _mk_connection(self, name=None, count=0):
 216         n = self.mksuffix(name, count)
 217         if name.startswith('gpio'):
 218             return "gpio{0}.axi_slave".format(n)
 219         if name.startswith('mux'):
 220             return "mux{0}.axi_slave".format(n)
 221
 222     def mksuffix(self, name, i):
 223         if name.startswith('mux'):
 224             return name[3:]
 225         return name[4:]
 226
 227     def mk_cellconn(self, cellnum, name, count):
 228         ret = []
 229         bank = self.mksuffix(name, count)
 230         txt = "       pinmux.mux_lines.cell{0}_mux(mux{1}.mux_config.mux[{2}]);"
 231         for p in self.peripheral.pinspecs:
 232             ret.append(txt.format(cellnum, bank, p['name'][1:]))
 233             cellnum += 1
 234         return ("\n".join(ret), cellnum)
 235
 236
 237 axi_slave_declarations = """\
 238 typedef  0  SlowMaster;
 239 {0}
 240 typedef  TAdd#(LastGen_slave_num,`ifdef CLINT       1 `else 0 `endif )
 241               CLINT_slave_num;
 242 typedef  TAdd#(CLINT_slave_num  ,`ifdef PLIC        1 `else 0 `endif )
 243               Plic_slave_num;
 244 typedef  TAdd#(Plic_slave_num   ,`ifdef AXIEXP      1 `else 0 `endif )
 245               AxiExp1_slave_num;
 246 typedef TAdd#(AxiExp1_slave_num,1) Num_Slow_Slaves;
 247 """
 248
 249 pinmux_cellrule = """\
 250     rule connect_select_lines_pinmux;
 251 {0}
 252     endrule
 253 """
 254
 255
 256 class CallFn(object):
 257     def __init__(self, peripheral, name):
 258         self.peripheral = peripheral
 259         self.name = name
 260
 261     def __call__(self, *args):
 262         #print "__call__", self.name, self.peripheral.slow, args
 263         if not self.peripheral.slow:
 264             return ''
 265         return getattr(self.peripheral.slow, self.name)(*args[1:])
 266
 267
 268 class PeripheralIface(object):
 269     def __init__(self, ifacename):
 270         self.slow = None
 271         slow = slowfactory.getcls(ifacename)
 272         print "Iface", ifacename, slow
 273         if slow:
 274             self.slow = slow(ifacename)
 275             self.slow.peripheral = self
 276         for fname in ['slowimport', 'slowifdecl', 'mkslow_peripheral',
 277                       'mk_connection', 'mk_cellconn']:
 278             fn = CallFn(self, fname)
 279             setattr(self, fname, types.MethodType(fn, self))
 280
 281         #print "PeripheralIface"
 282         #print dir(self)
 283
 284     def mksuffix(self, name, i):
 285         if self.slow is None:
 286             return i
 287         return self.slow.mksuffix(name, i)
 288
 289     def axi_reg_def(self, start, count):
 290         if not self.slow:
 291             return ('', 0)
 292         return self.slow.axi_reg_def(start, self.ifacename, count)
 293
 294     def axi_slave_idx(self, start, count):
 295         if not self.slow:
 296             return ('', 0)
 297         return self.slow.axi_slave_idx(start, self.ifacename, count)
 298
 299     def axi_addr_map(self, count):
 300         if not self.slow:
 301             return ''
 302         return self.slow.axi_addr_map(self.ifacename, count)
 303
 304
 305 class PeripheralInterfaces(object):
 306     def __init__(self):
 307         pass
 308
 309     def slowimport(self, *args):
 310         ret = []
 311         for (name, count) in self.ifacecount:
 312             #print "slowimport", name, self.data[name].slowimport
 313             ret.append(self.data[name].slowimport())
 314         return '\n'.join(list(filter(None, ret)))
 315
 316     def slowifdecl(self, *args):
 317         ret = []
 318         for (name, count) in self.ifacecount:
 319             for i in range(count):
 320                 ret.append(self.data[name].slowifdecl().format(i, name))
 321         return '\n'.join(list(filter(None, ret)))
 322
 323     def axi_reg_def(self, *args):
 324         ret = []
 325         start = 0x00011100  # start of AXI peripherals address
 326         for (name, count) in self.ifacecount:
 327             for i in range(count):
 328                 x = self.data[name].axi_reg_def(start, i)
 329                 #print ("ifc", name, x)
 330                 (rdef, offs) = x
 331                 ret.append(rdef)
 332                 start += offs
 333         return '\n'.join(list(filter(None, ret)))
 334
 335     def axi_slave_idx(self, *args):
 336         ret = []
 337         start = 0
 338         for (name, count) in self.ifacecount:
 339             for i in range(count):
 340                 (rdef, offs) = self.data[name].axi_slave_idx(start, i)
 341                 #print ("ifc", name, rdef, offs)
 342                 ret.append(rdef)
 343                 start += offs
 344         ret.append("typedef %d LastGen_slave_num" % (start - 1))
 345         decls = '\n'.join(list(filter(None, ret)))
 346         return axi_slave_declarations.format(decls)
 347
 348     def axi_addr_map(self, *args):
 349         ret = []
 350         for (name, count) in self.ifacecount:
 351             for i in range(count):
 352                 ret.append(self.data[name].axi_addr_map(i))
 353         return '\n'.join(list(filter(None, ret)))
 354
 355     def mkslow_peripheral(self, *args):
 356         ret = []
 357         for (name, count) in self.ifacecount:
 358             for i in range(count):
 359                 print "mkslow", name, count
 360                 x = self.data[name].mkslow_peripheral()
 361                 print name, count, x
 362                 suffix = self.data[name].mksuffix(name, i)
 363                 ret.append(x.format(suffix))
 364         return '\n'.join(list(filter(None, ret)))
 365
 366     def mk_connection(self, *args):
 367         ret = []
 368         for (name, count) in self.ifacecount:
 369             for i in range(count):
 370                 print "mk_conn", name, i
 371                 txt = self.data[name].mk_connection(i)
 372                 if name == 'gpioa':
 373                     print "txt", txt
 374                     print self.data[name].mk_connection
 375                 ret.append(txt)
 376         return '\n'.join(list(filter(None, ret)))
 377
 378     def mk_cellconn(self):
 379         ret = []
 380         cellcount = 0
 381         for (name, count) in self.ifacecount:
 382             for i in range(count):
 383                 res = self.data[name].mk_cellconn(cellcount, name, i)
 384                 if not res:
 385                     continue
 386                 (txt, cellcount) = res
 387                 ret.append(txt)
 388         ret = '\n'.join(list(filter(None, ret)))
 389         return pinmux_cellrule.format(ret)
 390
 391 class PFactory(object):
 392     def getcls(self, name):
 393         for k, v in {'uart': uart,
 394                 'rs232': rs232,
 395                 'twi': twi,
 396                 'qspi': qspi,
 397                 'pwm': pwm,
 398                 'gpio': gpio
 399                 }.items():
 400             if name.startswith(k):
 401                 return v
 402         return None
 403
 404
 405 slowfactory = PFactory()
 406
 407 if __name__ == '__main__':
 408     p = uart('uart')
 409     print p.slowimport()
 410     print p.slowifdecl()
 411     i = PeripheralIface('uart')
 412     print i, i.slow
 413     i = PeripheralIface('gpioa')
 414     print i, i.slow