3 """ pin interface declaration.
4 * name is the name of the pin
5 * ready, enabled and io all create a (* .... *) prefix
6 * action changes it to an "in" if true
9 def __init__(self
, name
,
17 self
.enabled
= enabled
20 self
.bitspec
= bitspec
if bitspec
else '1'
22 def ifacefmt(self
, fmtfn
=None):
26 status
.append('always_ready')
28 status
.append('always_enabled')
30 status
.append('result="io"')
33 res
+= ','.join(status
)
38 name
= fmtfn(self
.name
)
42 res
+= ' (Bit#(%s) in)' % self
.bitspec
44 res
+= " Bit#(%s) " % self
.bitspec
49 def ifacedef(self
, fmtoutfn
=None, fmtinfn
=None, fmtdecfn
=None):
52 fmtname
= fmtinfn(self
.name
)
54 res
+= fmtdecfn(self
.name
)
55 res
+= '(Bit#(%s) in);\n' % self
.bitspec
56 res
+= ' %s<=in;\n' % fmtname
59 fmtname
= fmtoutfn(self
.name
)
60 res
+= "%s=%s;" % (self
.name
, fmtname
)
64 class Interface(object):
65 """ create an interface from a list of pinspecs.
66 each pinspec is a dictionary, see Pin class arguments
69 def __init__(self
, pinspecs
):
72 if p
.get('outen') is True: # special case, generate 3 pins
76 for psuffix
in ['out', 'outen', 'in']:
77 _p
['name'] = "%s_%s" % (p
['name'], psuffix
)
78 _p
['action'] = psuffix
!= 'in'
79 self
.pins
.append(Pin(**_p
))
81 self
.pins
.append(Pin(**p
))
83 def ifacefmt(self
, *args
):
84 res
= '\n'.join(map(self
.ifacefmtdecpin
, self
.pins
)).format(*args
)
87 def ifacefmtdecfn(self
, name
):
90 def ifacefmtdecfn2(self
, name
):
93 def ifacefmtoutfn(self
, name
):
96 def ifacefmtinfn(self
, name
):
99 def ifacefmtdecpin(self
, pin
):
100 return pin
.ifacefmt(self
.ifacefmtdecfn
)
102 def ifacefmtpin(self
, pin
):
103 return pin
.ifacedef(self
.ifacefmtoutfn
, self
.ifacefmtinfn
,
106 def ifacedef(self
, *args
):
107 res
= '\n'.join(map(self
.ifacefmtpin
, self
.pins
))
108 res
= res
.format(*args
)
109 return '\n' + res
+ '\n'
112 class IOInterface(Interface
):
114 def ifacefmtoutfn(self
, name
):
115 """ for now strip off io{0}_ part """
116 return "cell{0}_mux_out.%s" % name
[6:]
118 def ifacefmtinfn(self
, name
):
119 return "cell{0}_mux_in"
122 # ========= Interface declarations ================ #
124 mux_interface
= Interface([{'name': 'cell{0}_mux', 'ready':False,
126 'bitspec': '{1}', 'action': True}])
128 io_interface
= IOInterface([{'name': 'io{0}_outputval', 'enabled': False},
129 {'name': 'io{0}_output_en', 'enabled': False},
130 {'name': 'io{0}_input_en', 'enabled': False},
131 {'name': 'io{0}_pullup_en', 'enabled': False},
132 {'name': 'io{0}_pulldown_en', 'enabled': False},
133 {'name': 'io{0}_drivestrength', 'enabled': False},
134 {'name': 'io{0}_pushpull_en', 'enabled': False},
135 {'name': 'io{0}_opendrain_en', 'enabled': False},
136 {'name': 'io{0}_inputval', 'action': True, 'io': True},
139 # == Peripheral Interface definitions == #
140 # these are the interface of the peripherals to the pin mux
141 # Outputs from the peripherals will be inputs to the pinmux
142 # module. Hence the change in direction for most pins
144 uartinterface_decl
= Interface([{'name': 'uart{0}_rx'},
145 {'name': 'uart{0}_tx', 'action': True},
148 spiinterface_decl
= Interface([{'name': 'spi{0}_sclk', 'action': True},
149 {'name': 'spi{0}_mosi', 'action': True},
150 {'name': 'spi{0}_nss', 'action': True},
151 {'name': 'spi{0}_miso'},
154 twiinterface_decl
= Interface([{'name': 'twi{0}_sda', 'outen': True},
155 {'name': 'twi{0}_scl', 'outen': True},
158 sdinterface_decl
= Interface([{'name': 'sd{0}_clk', 'action': True},
159 {'name': 'sd{0}_cmd', 'action': True},
160 {'name': 'sd{0}_d0', 'outen': True},
161 {'name': 'sd{0}_d1', 'outen': True},
162 {'name': 'sd{0}_d2', 'outen': True},
163 {'name': 'sd{0}_d3', 'outen': True}
166 jtaginterface_decl
= Interface([{'name': 'jtag{0}_tdi'},
167 {'name': 'jtag{0}_tms'},
168 {'name': 'jtag{0}_tclk'},
169 {'name': 'jtag{0}_trst'},
170 {'name': 'jtag{0}_tdo', 'action': True}])
172 pwminterface_decl
= Interface([{'name': "pwm{0}_pwm", 'action': True}])
174 # ======================================= #
177 if __name__
== '__main__':
179 def _pinmunge(p
, sep
, repl
, dedupe
=True):
180 """ munges the text so it's easier to compare.
181 splits by separator, strips out blanks, re-joins.
186 p
= filter(lambda x
: x
, p
) # filter out blanks
190 """ munges the text so it's easier to compare.
192 # first join lines by semicolons, strip out returns
194 p
= map(lambda x
: x
.replace('\n', ''), p
)
196 # now split first by brackets, then spaces (deduping on spaces)
197 p
= _pinmunge(p
, "(", " ( ", False)
198 p
= _pinmunge(p
, ")", " ) ", False)
199 p
= _pinmunge(p
, " ", " ")
202 from interface_def
import io_interface_def
203 print io_interface_def
.format(0)
204 print io_interface
.ifacedef(0)
205 assert io_interface_def
.format(0) == io_interface
.ifacedef(0)
207 mux_interfacetest
= '''
208 method Action cell{0}_mux(Bit#({1}) in);'''
209 print pinmunge(mux_interfacetest
.format(0,1))
210 print pinmunge(mux_interface
.ifacefmt(0, 1))
211 from interface_def
import mux_interface_def
212 print repr(mux_interface_def
.format(0, 1))
213 print repr(mux_interface
.ifacedef(0, 1))
214 assert mux_interface_def
.format(0,1) == mux_interface
.ifacedef(0,1)