invert uart rx/tx generation to match wiredefs and interfacedef
[pinmux.git] / src / interface_decl.py
1
2 class Pin(object):
3 """ pin interface declaration.
4 * name is the name of the pin
5 * ready, enabled and io all create a (* .... *) prefix
6 * action changes it to an "in" if true
7 """
8
9 def __init__(self, name,
10 ready=True,
11 enabled=True,
12 io=False,
13 action=False,
14 bitspec=None):
15 self.name = name
16 self.ready = ready
17 self.enabled = enabled
18 self.io = io
19 self.action = action
20 self.bitspec = bitspec if bitspec else '1'
21
22 def ifacefmt(self, fmtfn=None):
23 res = ' '
24 status = []
25 if self.ready:
26 status.append('always_ready')
27 if self.enabled:
28 status.append('always_enabled')
29 if self.io:
30 status.append('result="io"')
31 if status:
32 res += '(*'
33 res += ','.join(status)
34 res += '*)'
35 res += " method "
36 if self.io:
37 res += "\n "
38 name = fmtfn(self.name)
39 if self.action:
40 res += " Action "
41 res += name
42 res += ' (Bit#(%s) in)' % self.bitspec
43 else:
44 res += " Bit#(%s) " % self.bitspec
45 res += name
46 res += ";"
47 return res
48
49 def ifacedef(self, fmtoutfn=None, fmtinfn=None, fmtdecfn=None):
50 res = ' method '
51 if self.action:
52 fmtname = fmtinfn(self.name)
53 res += "Action "
54 res += fmtdecfn(self.name)
55 res += '(Bit#(%s) in);\n' % self.bitspec
56 res += ' %s<=in;\n' % fmtname
57 res += ' endmethod'
58 else:
59 fmtname = fmtoutfn(self.name)
60 res += "%s=%s;" % (self.name, fmtname)
61 return res
62
63
64 class Interface(object):
65 """ create an interface from a list of pinspecs.
66 each pinspec is a dictionary, see Pin class arguments
67 """
68
69 def __init__(self, pinspecs):
70 self.pins = []
71 for p in pinspecs:
72 if p.get('outen') is True: # special case, generate 3 pins
73 _p = {}
74 _p.update(p)
75 del _p['outen']
76 for psuffix in ['out', 'outen', 'in']:
77 _p['name'] = "%s_%s" % (p['name'], psuffix)
78 _p['action'] = psuffix != 'in'
79 self.pins.append(Pin(**_p))
80 else:
81 self.pins.append(Pin(**p))
82
83 def ifacefmt(self, *args):
84 res = '\n'.join(map(self.ifacefmtdecpin, self.pins)).format(*args)
85 return '\n' + res
86
87 def ifacefmtdecfn(self, name):
88 return name
89
90 def ifacefmtdecfn2(self, name):
91 return name
92
93 def ifacefmtoutfn(self, name):
94 return "wr%s" % name
95
96 def ifacefmtinfn(self, name):
97 return "wr%s" % name
98
99 def ifacefmtdecpin(self, pin):
100 return pin.ifacefmt(self.ifacefmtdecfn)
101
102 def ifacefmtpin(self, pin):
103 return pin.ifacedef(self.ifacefmtoutfn, self.ifacefmtinfn,
104 self.ifacefmtdecfn2)
105
106 def ifacedef(self, *args):
107 res = '\n'.join(map(self.ifacefmtpin, self.pins)).format(*args)
108 return '\n' + res + '\n'
109
110
111 class MuxInterface(Interface):
112
113 def ifacefmtdecfn2(self, name):
114 return "cell{0}_mux"
115
116 def ifacefmtdecfn(self, name):
117 return "cell{0}_mux"
118
119 def ifacefmtinfn(self, name):
120 return "wrmux{0}"
121
122 class IOInterface(Interface):
123
124 #def ifacefmtdecfn(self, name):
125 # return "cell{0}_mux"
126
127 def ifacefmtoutfn(self, name):
128 return "cell{0}_out.%s" % (name[3:-4])
129
130 def ifacefmtinfn(self, name):
131 return "cell{0}_in"
132
133
134 # ========= Interface declarations ================ #
135
136 mux_interface = MuxInterface([{'name': 'cell{0}', 'ready':False,
137 'enabled':False,
138 'bitspec': '{1}', 'action': True}])
139
140 io_interface = IOInterface([{'name': 'io_outputval_{0}', 'enabled': False},
141 {'name': 'io_output_en_{0}', 'enabled': False},
142 {'name': 'io_input_en_{0}', 'enabled': False},
143 {'name': 'io_pullup_en_{0}', 'enabled': False},
144 {'name': 'io_pulldown_en_{0}', 'enabled': False},
145 {'name': 'io_drivestrength_{0}', 'enabled': False},
146 {'name': 'io_pushpull_en_{0}', 'enabled': False},
147 {'name': 'io_opendrain_en_{0}', 'enabled': False},
148 {'name': 'io_inputval_{0}', 'action': True, 'io': True},
149 ])
150
151 # == Peripheral Interface definitions == #
152 # these are the interface of the peripherals to the pin mux
153 # Outputs from the peripherals will be inputs to the pinmux
154 # module. Hence the change in direction for most pins
155
156 uartinterface_decl = Interface([{'name': 'rx_{0}'},
157 {'name': 'tx_{0}', 'action': True},
158 ])
159
160 spiinterface_decl = Interface([{'name': 'sclk_{0}', 'action': True},
161 {'name': 'mosi_{0}', 'action': True},
162 {'name': 'ss_{0}', 'action': True},
163 {'name': 'miso_{0}'},
164 ])
165
166 twiinterface_decl = Interface([{'name': 'sda{0}', 'outen': True},
167 {'name': 'scl{0}', 'outen': True},
168 ])
169
170 sdinterface_decl = Interface([{'name': 'sd{0}_clk', 'action': True},
171 {'name': 'sd{0}_cmd', 'action': True},
172 {'name': 'sd{0}_d0', 'outen': True},
173 {'name': 'sd{0}_d1', 'outen': True},
174 {'name': 'sd{0}_d2', 'outen': True},
175 {'name': 'sd{0}_d3', 'outen': True}
176 ])
177
178 jtaginterface_decl = Interface([{'name': 'jtag{0}_tdi'},
179 {'name': 'jtag{0}_tms'},
180 {'name': 'jtag{0}_tclk'},
181 {'name': 'jtag{0}_trst'},
182 {'name': 'jtag{0}_tdo', 'action': True}])
183
184 pwminterface_decl = Interface([{'name': "pwm{0}", 'action': True}])
185
186 # ======================================= #
187
188 # basic test
189 if __name__ == '__main__':
190
191 def _pinmunge(p, sep, repl, dedupe=True):
192 """ munges the text so it's easier to compare.
193 splits by separator, strips out blanks, re-joins.
194 """
195 p = p.strip()
196 p = p.split(sep)
197 if dedupe:
198 p = filter(lambda x: x, p) # filter out blanks
199 return repl.join(p)
200
201 def pinmunge(p):
202 """ munges the text so it's easier to compare.
203 """
204 # first join lines by semicolons, strip out returns
205 p = p.split(";")
206 p = map(lambda x: x.replace('\n', ''), p)
207 p = '\n'.join(p)
208 # now split first by brackets, then spaces (deduping on spaces)
209 p = _pinmunge(p, "(", " ( ", False)
210 p = _pinmunge(p, ")", " ) ", False)
211 p = _pinmunge(p, " ", " ")
212 return p
213
214 from interface_def import io_interface_def
215 print io_interface_def.format(0)
216 print io_interface.ifacedef(0)
217 assert io_interface_def.format(0) == io_interface.ifacedef(0)
218
219 mux_interfacetest = '''
220 method Action cell{0}_mux(Bit#({1}) in);'''
221 print pinmunge(mux_interfacetest.format(0,1))
222 print pinmunge(mux_interface.ifacefmt(0, 1))
223 from interface_def import mux_interface_def
224 print repr(mux_interface_def.format(0, 1))
225 print repr(mux_interface.ifacedef(0, 1))
226 assert mux_interface_def.format(0,1) == mux_interface.ifacedef(0,1)
227