1 """Decode2ToExecute1Type
3 based on Anton Blanchard microwatt decode2.vhdl
6 from nmigen
import Signal
, Record
7 from nmutil
.iocontrol
import RecordObject
8 from openpower
.decoder
.power_enums
import (MicrOp
, CryIn
, Function
,
9 SPRfull
, SPRreduced
, LDSTMode
)
10 from openpower
.consts
import TT
11 from openpower
.exceptions
import LDSTException
16 def __init__(self
, width
, name
):
17 name_ok
= "%s_ok" % name
18 layout
= ((name
, width
), (name_ok
, 1))
19 Record
.__init
__(self
, layout
)
20 self
.data
= getattr(self
, name
) # convenience
21 self
.ok
= getattr(self
, name_ok
) # convenience
22 self
.data
.reset_less
= True # grrr
23 self
.reset_less
= True # grrr
26 return [self
.data
, self
.ok
]
29 class IssuerDecode2ToOperand(RecordObject
):
30 """IssuerDecode2ToOperand
32 contains the subset of fields needed for Issuer to decode the instruction
33 and get register rdflags signals set up. it also doubles up as the
34 "Trap" temporary store, because part of the Decoder's job is to
35 identify whether a trap / interrupt / exception should occur.
38 def __init__(self
, name
=None):
40 RecordObject
.__init
__(self
, name
=name
)
42 # current "state" (TODO: this in its own Record)
43 self
.msr
= Signal(64, reset_less
=True)
44 self
.cia
= Signal(64, reset_less
=True)
46 # instruction, type and decoded information
47 self
.insn
= Signal(32, reset_less
=True) # original instruction
48 self
.insn_type
= Signal(MicrOp
, reset_less
=True)
49 self
.fn_unit
= Signal(Function
, reset_less
=True)
50 self
.lk
= Signal(reset_less
=True)
51 self
.rc
= Data(1, "rc")
52 self
.oe
= Data(1, "oe")
53 self
.input_carry
= Signal(CryIn
, reset_less
=True)
54 self
.traptype
= Signal(TT
.size
, reset_less
=True) # trap main_stage.py
55 self
.ldst_exc
= LDSTException("exc")
56 self
.trapaddr
= Signal(13, reset_less
=True)
57 self
.read_cr_whole
= Data(8, "cr_rd") # CR full read mask
58 self
.write_cr_whole
= Data(8, "cr_wr") # CR full write mask
59 self
.is_32bit
= Signal(reset_less
=True)
62 class Decode2ToOperand(IssuerDecode2ToOperand
):
64 def __init__(self
, name
=None):
66 IssuerDecode2ToOperand
.__init
__(self
, name
=name
)
68 # instruction, type and decoded information
69 self
.imm_data
= Data(64, name
="imm")
70 self
.invert_in
= Signal(reset_less
=True)
71 self
.zero_a
= Signal(reset_less
=True)
72 self
.output_carry
= Signal(reset_less
=True)
73 self
.input_cr
= Signal(reset_less
=True) # instr. has a CR as input
74 self
.output_cr
= Signal(reset_less
=True) # instr. has a CR as output
75 self
.invert_out
= Signal(reset_less
=True)
76 self
.is_32bit
= Signal(reset_less
=True)
77 self
.is_signed
= Signal(reset_less
=True)
78 self
.data_len
= Signal(4, reset_less
=True) # bytes
79 self
.byte_reverse
= Signal(reset_less
=True)
80 self
.sign_extend
= Signal(reset_less
=True)# do we need this?
81 self
.ldst_mode
= Signal(LDSTMode
, reset_less
=True) # LD/ST mode
82 self
.write_cr0
= Signal(reset_less
=True)
85 class Decode2ToExecute1Type(RecordObject
):
87 def __init__(self
, name
=None, asmcode
=True, opkls
=None, do
=None,
95 if do
is None and opkls
is None:
96 opkls
= Decode2ToOperand
98 RecordObject
.__init
__(self
, name
=name
)
101 self
.asmcode
= Signal(8, reset_less
=True) # only for simulator
102 self
.write_reg
= Data(7, name
="rego")
103 self
.write_ea
= Data(7, name
="ea") # for LD/ST in update mode
104 self
.read_reg1
= Data(7, name
="reg1")
105 self
.read_reg2
= Data(7, name
="reg2")
106 self
.read_reg3
= Data(7, name
="reg3")
107 self
.write_spr
= Data(SPR
, name
="spro")
108 self
.read_spr1
= Data(SPR
, name
="spr1")
109 #self.read_spr2 = Data(SPR, name="spr2") # only one needed
111 self
.xer_in
= Signal(3, reset_less
=True) # xer might be read
112 self
.xer_out
= Signal(reset_less
=True) # xer might be written
114 self
.read_fast1
= Data(3, name
="fast1")
115 self
.read_fast2
= Data(3, name
="fast2")
116 self
.write_fast1
= Data(3, name
="fasto1")
117 self
.write_fast2
= Data(3, name
="fasto2")
119 self
.read_cr1
= Data(7, name
="cr_in1")
120 self
.read_cr2
= Data(7, name
="cr_in2")
121 self
.read_cr3
= Data(7, name
="cr_in2")
122 self
.write_cr
= Data(7, name
="cr_out")
124 # decode operand data
125 print ("decode2execute init", name
, opkls
, do
)
126 #assert name is not None, str(opkls)
130 self
.do
= opkls(name
)