8 from nmutil
.formaltest
import FHDLTestCase
9 from openpower
.decoder
.isa
.test_runner
import run_tst
10 from openpower
.decoder
.power_decoder
import create_pdecode
11 from openpower
.decoder
.power_decoder2
import PowerDecode2
12 from openpower
.decoder
.selectable_int
import SelectableInt
13 from openpower
.simulator
.program
import Program
18 for chunk
in (mapping
[idx
:idx
+32] for idx
in range(0, len(mapping
), 32)):
22 for (idx
, (instr
, ireg
, oreg
)) in enumerate(chunk
):
23 instrs
.append(f
"{instr} {idx}, {idx}")
26 iregs
= (iregs
+ zeros
)[:32]
27 oregs
= (oregs
+ zeros
)[:32]
28 yield (instrs
, iregs
, oregs
)
31 class EXTSTestCase(FHDLTestCase
):
32 CWD
= os
.path
.dirname(os
.path
.realpath(__file__
))
33 ISAFN
= os
.path
.normpath(os
.path
.join(CWD
,
34 "..", "..", "..", "..", "openpower", "isafunctions"))
35 REGEX
= re
.compile(r
"extsxl_(0x[0-9A-Fa-f]{16}).csv")
36 XLENS
= (64, 32, 16, 8)
38 def __init__(self
, *args
, **kwargs
):
39 super().__init
__(*args
, **kwargs
)
40 pdecode
= create_pdecode(include_fp
=True)
41 self
.pdecode2
= PowerDecode2(pdecode
)
43 def run_tst(self
, mapping
, xlen
):
44 for (instrs
, iregs
, oregs
) in tstgen(mapping
):
47 with
Program(instrs
, bigendian
=False) as program
:
48 sim
= self
.run_tst_program(program
, iregs
)
49 for (idx
, gpr
) in enumerate(range(nr
)):
51 f
"{instrs[idx]} {iregs[idx]:016x} {oregs[idx]:016x}")
52 self
.assertEqual(sim
.gpr(gpr
),
53 SelectableInt(oregs
[gpr
], xlen
))
56 data
= {xlen
: [] for xlen
in EXTSTestCase
.XLENS
}
57 wildcard
= os
.path
.join(EXTSTestCase
.ISAFN
, "extsxl_*.csv")
58 for path
in glob
.glob(wildcard
):
59 name
= path
[len(EXTSTestCase
.ISAFN
+ os
.path
.sep
):]
60 match
= EXTSTestCase
.REGEX
.match(name
)
63 ireg
= int(match
[1], 16)
64 with codecs
.open(path
, "rb", "UTF-8") as stream
:
65 csv_reader
= csv
.reader(stream
, delimiter
=",")
66 _
= stream
.readline() # we already know the format
67 for row
in csv_reader
:
68 assert len(row
) == len(("instr",) + EXTSTestCase
.XLENS
)
69 row
= tuple(map(lambda s
: s
.strip(), row
))
73 map(lambda v
: int(v
, 16), row
[1:])))
74 for (xlen
, oreg
) in xlens
.items():
75 data
[xlen
].append((instr
, ireg
, oreg
))
77 # FIXME drop filter once XLEN != 64 is unlocked
78 for xlen
in filter(lambda v
: v
== 64, data
):
79 self
.run_tst(data
[xlen
], xlen
)
81 def run_tst_program(self
, prog
, initial_regs
=[0] * 32):
82 simulator
= run_tst(prog
, initial_regs
, pdecode2
=self
.pdecode2
)
87 if __name__
== "__main__":