convert Logical svp64_cases.py to new vector reg form
[openpower-isa.git] / src / openpower / decoder / isa / test_caller_svp64_logical.py
1 """ Decoder tests
2
3 related bugs:
4
5 *
6 """
7
8 import unittest
9 import sys
10
11 # These tests utilize the run_hdl=False parameter to compare
12 # simulator with expected states
13 from soc.simple.test.test_runner import TestRunner
14 from openpower.test.logical.svp64_cases import SVP64LogicalTestCase
15
16
17 if __name__ == "__main__":
18
19 # allow list of testing to be selected by command-line
20 testing = sys.argv[1:]
21 sys.argv = sys.argv[:1]
22
23 if not testing:
24 testing = ['svp64_logical']
25
26 unittest.main(exit=False)
27 suite = unittest.TestSuite()
28
29 # dictionary of data for tests
30 tests = {'svp64_logical': SVP64LogicalTestCase().test_data}
31
32 # walk through all tests, those requested get added
33 for tname, data in tests.items():
34 if tname in testing:
35 suite.addTest(TestRunner(data, run_hdl=False))
36
37 runner = unittest.TextTestRunner()
38 runner.run(suite)