src/openpower/decoder/isa/test_caller_transcendentals.py

   1 from nmigen import Module, Signal
   2 from nmigen.back.pysim import Simulator, Delay, Settle
   3 from nmutil.formaltest import FHDLTestCase
   4 import unittest
   5 from openpower.decoder.isa.caller import ISACaller
   6 from openpower.decoder.power_decoder import (create_pdecode)
   7 from openpower.decoder.power_decoder2 import (PowerDecode2)
   8 from openpower.simulator.program import Program
   9 from openpower.decoder.isa.caller import ISACaller, SVP64State
  10 from openpower.decoder.selectable_int import SelectableInt
  11 from openpower.decoder.orderedset import OrderedSet
  12 from openpower.decoder.isa.all import ISA
  13 from openpower.decoder.isa.test_caller import Register, run_tst
  14 from copy import deepcopy
  15 from openpower.sv.trans.svp64 import SVP64Asm
  16 from openpower.decoder.helpers import fp64toselectable
  17 from openpower.decoder.isafunctions.double2single import DOUBLE2SINGLE
  18
  19 import math
  20
  21 class FPTranscendentalsTestCase(FHDLTestCase):
  22
  23     def _check_regs(self, sim, expected_int, expected_fpr):
  24         for i in range(32):
  25             self.assertEqual(sim.gpr(i), SelectableInt(expected[i], 64))
  26         for i in range(32):
  27             self.assertEqual(sim.fpr(i), SelectableInt(expected_fpr[i], 64))
  28
  29     def test_fp_sins_coss(self):
  30         """>>> lst = ["fsins 1, 2",
  31                       "fcoss 3, 2",
  32                      ]
  33         """
  34         lst = SVP64Asm(["fsins 1, 2",
  35                         "fcoss 3, 2",
  36                      ])
  37         lst = list(lst)
  38
  39         with Program(lst, bigendian=False) as program:
  40             fprs = [0] * 32
  41             for i in range(-8, 9):
  42                 a = math.pi * (i / 8.0) * 2.0
  43                 fprs[2] = fp64toselectable(a)
  44                 t = math.sin(a)
  45                 u = math.cos(a)
  46                 a1 = fp64toselectable(a) # convert to Power single
  47                 t = DOUBLE2SINGLE(fp64toselectable(t)) # convert to Power single
  48                 u = DOUBLE2SINGLE(fp64toselectable(u)) # convert to Power single
  49
  50                 with self.subTest():
  51                     sim = self.run_tst_program(program, initial_fprs=fprs)
  52                     print("FPR 1", sim.fpr(1))
  53                     print("FPR 2", sim.fpr(2))
  54                     print("FPR 3", sim.fpr(3))
  55                     self.assertEqual(sim.fpr(2), SelectableInt(a1, 64))
  56                     self.assertEqual(sim.fpr(1), SelectableInt(t, 64))
  57                     self.assertEqual(sim.fpr(3), SelectableInt(u, 64))
  58
  59     def run_tst_program(self, prog, initial_regs=None,
  60                               initial_mem=None,
  61                               initial_fprs=None):
  62         if initial_regs is None:
  63             initial_regs = [0] * 32
  64         simulator = run_tst(prog, initial_regs, mem=initial_mem,
  65                                   initial_fprs=initial_fprs)
  66         print ("GPRs")
  67         simulator.gpr.dump()
  68         print ("FPRs")
  69         simulator.fpr.dump()
  70         return simulator
  71
  72
  73 if __name__ == "__main__":
  74     unittest.main()