pysvp64db: fix traversal
[openpower-isa.git] / src / openpower / decoder / isa / test_caller_transcendentals.py
1 import math
2 import unittest
3
4 from nmutil.formaltest import FHDLTestCase
5 from openpower.decoder.helpers import fp64toselectable
6 from openpower.decoder.isa.test_caller import run_tst
7 from openpower.decoder.isafunctions.double2single import (
8 ISACallerFnHelper_double2single)
9 from openpower.decoder.selectable_int import SelectableInt
10 from openpower.simulator.program import Program
11 from openpower.insndb.asm import SVP64Asm
12
13 # really bad hack. need to access the DOUBLE2SINGLE function auto-generated
14 # from pseudo-code.
15 fph = ISACallerFnHelper_double2single(XLEN=64, FPSCR=None)
16 fph.namespace = {'FPSCR': fph.FPSCR,
17 'NIA': None,
18 'XLEN': fph.XLEN,
19 'CIA': None,
20 'SVSTATE': None,
21 }
22
23
24 class FPTranscendentalsTestCase(FHDLTestCase):
25 def _check_regs(self, sim, expected_int, expected_fpr):
26 for i in range(32):
27 self.assertEqual(sim.gpr(i), SelectableInt(expected[i], 64))
28 for i in range(32):
29 self.assertEqual(sim.fpr(i), SelectableInt(expected_fpr[i], 64))
30
31 def tst_fp_sins_coss(self):
32 """>>> lst = ["fsins 1, 2",
33 "fcoss 3, 2",
34 ]
35 """
36 lst = SVP64Asm(["fsins 1, 2",
37 "fcoss 3, 2",
38 ])
39 lst = list(lst)
40
41 with Program(lst, bigendian=False) as program:
42 fprs = [0] * 32
43 for i in range(-8, 9):
44 a = math.pi * (i / 8.0) * 2.0
45 fprs[2] = fp64toselectable(a)
46 t = math.sin(a)
47 u = math.cos(a)
48 a1 = fp64toselectable(a) # convert to Power single
49 t = fph.DOUBLE2SINGLE(fp64toselectable(t)) # to Power single
50 u = fph.DOUBLE2SINGLE(fp64toselectable(u)) # to Power single
51
52 with self.subTest():
53 sim = self.run_tst_program(program, initial_fprs=fprs)
54 print("FPR 1", sim.fpr(1))
55 print("FPR 2", sim.fpr(2))
56 print("FPR 3", sim.fpr(3))
57 self.assertEqual(sim.fpr(2), SelectableInt(a1, 64))
58 self.assertEqual(sim.fpr(1), SelectableInt(t, 64))
59 self.assertEqual(sim.fpr(3), SelectableInt(u, 64))
60
61 def test_fp_coss_cvt(self):
62 """>>> lst = [
63 "fcoss 3, 2",
64 ]
65
66 this is a base / proving-ground for the more complex SVP64
67 variant in test_caller_svp64_dct.py:
68 test_sv_remap_dct_cos_precompute_8
69 """
70 lst = SVP64Asm(["std 1, 0(0)",
71 "lfd 0, 0(0)",
72 "fcfids 0, 0",
73 "fadds 0, 0, 3", # plus 0.5
74 "fmuls 0, 0, 1", # times PI
75 "fdivs 0, 0, 2", # div 4.0
76 "fcoss 4, 0",
77 ])
78 lst = list(lst)
79
80 with Program(lst, bigendian=False) as program:
81 gprs = [0] * 32
82 fprs = [0] * 32
83 # constants
84 fprs[3] = fp64toselectable(0.5) # 0.5
85 fprs[1] = fp64toselectable(math.pi) # pi
86 fprs[2] = fp64toselectable(4.0) # 4.0
87 # for i in range(-8, 9):
88 for i in range(7, 8):
89 a = math.pi * ((i+0.5) / 4.0)
90 gprs[1] = i
91 a1 = fph.DOUBLE2SINGLE(fp64toselectable(a)) # to Power single
92 a = float(a1)
93 u = math.cos(a)
94 u = fph.DOUBLE2SINGLE(fp64toselectable(u)) # to Power single
95
96 with self.subTest():
97 sim = self.run_tst_program(
98 program, gprs, initial_fprs=fprs)
99 print("FPR 0", sim.fpr(0), float(sim.fpr(0)))
100 print("FPR 1", sim.fpr(1), float(sim.fpr(1)))
101 print("FPR 2", sim.fpr(2), float(sim.fpr(2)))
102 print("FPR 3", sim.fpr(3), float(sim.fpr(3)))
103 print("FPR 4", sim.fpr(4), float(sim.fpr(4)))
104 # sign should not do this, but hey
105 actual_r = float(sim.fpr(0))
106 expected_r = float(a1)
107 err = abs(actual_r - expected_r) / expected_r
108 self.assertTrue(err < 1e-6)
109 actual_r = float(sim.fpr(4))
110 expected_r = float(u)
111 err = abs(actual_r - expected_r) / expected_r
112 self.assertTrue(err < 1e-6)
113
114 def run_tst_program(self, prog, initial_regs=None,
115 initial_mem=None,
116 initial_fprs=None):
117 if initial_regs is None:
118 initial_regs = [0] * 32
119 simulator = run_tst(prog, initial_regs, mem=initial_mem,
120 initial_fprs=initial_fprs)
121 print("GPRs")
122 simulator.gpr.dump()
123 print("FPRs")
124 simulator.fpr.dump()
125 return simulator
126
127
128 if __name__ == "__main__":
129 unittest.main()