1 from nmigen
import Module
, Signal
3 # NOTE: to use cxxsim, export NMIGEN_SIM_MODE=cxxsim from the shell
4 # Also, check out the cxxsim nmigen branch, and latest yosys from git
5 from nmutil
.sim_tmp_alternative
import Simulator
, Delay
, Settle
7 from nmutil
.formaltest
import FHDLTestCase
8 from nmigen
.cli
import rtlil
11 from openpower
.decoder
.power_decoder
import (create_pdecode
)
12 from openpower
.decoder
.power_enums
import (Function
, MicrOp
,
13 In1Sel
, In2Sel
, In3Sel
,
15 OutSel
, RC
, LdstLen
, CryIn
,
17 get_signal_name
, get_csv
)
20 class DecoderTestCase(FHDLTestCase
):
22 def run_tst(self
, bitsel
, csvname
, minor
=None, suffix
=None, opint
=True):
26 function_unit
= Signal(Function
)
27 internal_op
= Signal(MicrOp
)
28 in1_sel
= Signal(In1Sel
)
29 in2_sel
= Signal(In2Sel
)
30 in3_sel
= Signal(In3Sel
)
31 out_sel
= Signal(OutSel
)
32 cr_in
= Signal(CRInSel
)
33 cr_out
= Signal(CROutSel
)
35 ldst_len
= Signal(LdstLen
)
36 cry_in
= Signal(CryIn
)
38 comb
+= bigendian
.eq(0)
40 # opcodes = get_csv(csvname)
41 m
.submodules
.dut
= dut
= create_pdecode()
42 comb
+= [dut
.raw_opcode_in
.eq(opcode
),
43 dut
.bigendian
.eq(bigendian
),
44 function_unit
.eq(dut
.op
.function_unit
),
45 in1_sel
.eq(dut
.op
.in1_sel
),
46 in2_sel
.eq(dut
.op
.in2_sel
),
47 in3_sel
.eq(dut
.op
.in3_sel
),
48 out_sel
.eq(dut
.op
.out_sel
),
49 cr_in
.eq(dut
.op
.cr_in
),
50 cr_out
.eq(dut
.op
.cr_out
),
51 rc_sel
.eq(dut
.op
.rc_sel
),
52 ldst_len
.eq(dut
.op
.ldst_len
),
53 cry_in
.eq(dut
.op
.cry_in
),
54 internal_op
.eq(dut
.op
.internal_op
)]
57 opcodes
= get_csv(csvname
)
63 # skip "conditions" for now
64 if (row
['CONDITIONS'] and
65 row
['CONDITIONS'] in ['SVP64BREV']):
68 if not opint
: # HACK: convert 001---10 to 0b00100010
69 op
= "0b" + op
.replace('-', '0')
70 print("opint", opint
, row
['opcode'], op
)
73 yield opcode
[bitsel
[0]:bitsel
[1]].eq(int(op
, 0))
77 yield opcode
[minorbits
[0]:minorbits
[1]].eq(minor
[0])
79 # OR 0, 0, 0 ; 0x60000000 is decoded as a NOP
80 # If we're testing the OR instruction, make sure
81 # that the instruction is not 0x60000000
83 yield opcode
[24:25].eq(0b11)
87 signals
= [(function_unit
, Function
, 'unit'),
88 (internal_op
, MicrOp
, 'internal op'),
89 (in1_sel
, In1Sel
, 'in1'),
90 (in2_sel
, In2Sel
, 'in2'),
91 (in3_sel
, In3Sel
, 'in3'),
92 (out_sel
, OutSel
, 'out'),
93 (cr_in
, CRInSel
, 'CR in'),
94 (cr_out
, CROutSel
, 'CR out'),
96 (cry_in
, CryIn
, 'cry in'),
97 (ldst_len
, LdstLen
, 'ldst len')]
98 for sig
, enm
, name
in signals
:
100 expected
= enm
[row
[name
]]
101 msg
= f
"{sig.name} == {enm(result)}, expected: {expected}"
102 msg
+= "- op: %x, opcode %s" % (opint
, row
['opcode'])
104 self
.assertEqual(enm(result
), expected
, msg
)
105 for bit
in single_bit_flags
:
106 sig
= getattr(dut
.op
, get_signal_name(bit
))
108 expected
= int(row
[bit
])
109 msg
= f
"{sig.name} == {result}, expected: {expected}"
110 self
.assertEqual(expected
, result
, msg
)
111 sim
.add_process(process
)
112 prefix
= os
.path
.splitext(csvname
)[0]
113 with sim
.write_vcd("%s.vcd" % prefix
, "%s.gtkw" % prefix
, traces
=[
114 opcode
, function_unit
, internal_op
,
118 def generate_ilang(self
):
119 conditions
= {'SVP64BREV': Signal(name
="svp64brev", reset_less
=True),
120 'SVP64FFT': Signal(name
="svp64fft", reset_less
=True),
122 pdecode
= create_pdecode(conditions
=conditions
)
123 vl
= rtlil
.convert(pdecode
, ports
=pdecode
.ports())
124 with
open("decoder.il", "w") as f
:
127 def test_major(self
):
128 self
.run_tst((26, 32), "major.csv")
129 self
.generate_ilang()
131 def test_minor_19(self
):
132 self
.run_tst((1, 11), "minor_19.csv", minor
=(19, (26, 32)),
135 # def test_minor_19_00000(self):
136 # self.run_tst((1, 11), "minor_19_00000.csv")
138 def test_minor_30(self
):
139 self
.run_tst((1, 5), "minor_30.csv", minor
=(30, (26, 32)))
141 def test_minor_31(self
):
142 self
.run_tst((1, 11), "minor_31.csv", minor
=(31, (26, 32)))
144 def test_minor_58(self
):
145 self
.run_tst((0, 2), "minor_58.csv", minor
=(58, (26, 32)))
147 def test_minor_62(self
):
148 self
.run_tst((0, 2), "minor_62.csv", minor
=(62, (26, 32)))
150 # #def test_minor_31_prefix(self):
151 # # self.run_tst(10, "minor_31.csv", suffix=(5, 10))
153 # def test_extra(self):
154 # self.run_tst(32, "extra.csv", opint=False)
155 # self.generate_ilang(32, "extra.csv", opint=False)
158 if __name__
== "__main__":