2 from nmutil
.formaltest
import FHDLTestCase
3 from openpower
.simulator
.program
import Program
4 from openpower
.simulator
.qemu
import run_program
5 from openpower
.decoder
.isa
.all
import ISA
6 from openpower
.test
.common
import TestCase
7 from openpower
.simulator
.test_sim
import DecoderBase
8 from openpower
.endian
import bigendian
12 class DivTestCases(FHDLTestCase
):
15 def __init__(self
, name
="div"):
16 super().__init
__(name
)
19 def test_0_divw(self
):
20 lst
= ["addi 1, 0, 0x5678",
24 with
Program(lst
, bigendian
) as program
:
25 self
.run_tst_program(program
, [1, 2, 3])
27 def test_1_divw_(self
):
28 lst
= ["addi 1, 0, 0x5678",
32 with
Program(lst
, bigendian
) as program
:
33 self
.run_tst_program(program
, [1, 2, 3])
35 def test_2_divw_(self
):
36 lst
= ["addi 1, 0, 0x1234",
40 with
Program(lst
, bigendian
) as program
:
41 self
.run_tst_program(program
, [1, 2, 3])
43 def test_1_divwe(self
):
44 lst
= ["addi 1, 0, 0x5678",
48 with
Program(lst
, bigendian
) as program
:
49 self
.run_tst_program(program
, [1, 2, 3])
51 def test_2_divweu(self
):
52 lst
= ["addi 1, 0, 0x5678",
56 with
Program(lst
, bigendian
) as program
:
57 self
.run_tst_program(program
, [1, 2, 3])
59 def test_4_moduw(self
):
60 lst
= ["addi 1, 0, 0x5678",
64 with
Program(lst
, bigendian
) as program
:
65 self
.run_tst_program(program
, [1, 2, 3])
67 def test_5_div_regression(self
):
68 lst
= ["addi 1, 0, 0x4",
74 with
Program(lst
, bigendian
) as program
:
75 self
.run_tst_program(program
, [1, 2, 3])
77 def run_tst_program(self
, prog
, initial_regs
=None, initial_sprs
=None,
79 initial_regs
= [0] * 32
80 tc
= TestCase(prog
, self
.test_name
, initial_regs
, initial_sprs
, 0,
82 self
.test_data
.append(tc
)
85 class DivZeroTestCases(FHDLTestCase
):
88 def __init__(self
, name
="divbyzero"):
89 super().__init
__(name
)
92 def test_0_divw(self
):
93 lst
= ["addi 1, 0, 0x5678",
97 with
Program(lst
, bigendian
) as program
:
98 self
.run_tst_program(program
, [1, 2, 3])
100 def test_1_divwe(self
):
101 lst
= ["addi 1, 0, 0x5678",
105 with
Program(lst
, bigendian
) as program
:
106 self
.run_tst_program(program
, [1, 2, 3])
108 def test_2_divweu(self
):
109 lst
= ["addi 1, 0, 0x5678",
113 with
Program(lst
, bigendian
) as program
:
114 self
.run_tst_program(program
, [1, 2, 3])
116 def test_4_moduw(self
):
117 lst
= ["addi 1, 0, 0x5678",
121 with
Program(lst
, bigendian
) as program
:
122 self
.run_tst_program(program
, [1, 2, 3])
124 def run_tst_program(self
, prog
, initial_regs
=None, initial_sprs
=None,
126 initial_regs
= [0] * 32
127 tc
= TestCase(prog
, self
.test_name
, initial_regs
, initial_sprs
, 0,
129 self
.test_data
.append(tc
)
133 class DivDecoderTestCase(DecoderBase
, DivTestCases
):
136 class DivZeroDecoderTestCase(DecoderBase
, DivZeroTestCases
):
139 if __name__
== "__main__":