3 # NOTE that this program is python2 compatible, please do not stop it
4 # from working by adding syntax that prevents that.
6 # Initial version written by lkcl Oct 2020
7 # This program analyses the Power 9 op codes and looks at in/out register uses
8 # The results are displayed:
9 # https://libre-soc.org/openpower/opcode_regs_deduped/
11 # It finds .csv files in the directory isatables/
12 # then goes through the categories and creates svp64 CSV augmentation
13 # tables on a per-opcode basis
17 from os
.path
import dirname
, join
19 from collections
import OrderedDict
20 from openpower
.decoder
.power_svp64
import SVP64RM
21 from openpower
.decoder
.power_enums
import find_wiki_file
, get_csv
24 # Write an array of dictionaries to the CSV file name:
25 def write_csv(name
, items
, headers
):
26 file_path
= find_wiki_file(name
)
27 with
open(file_path
, 'w') as csvfile
:
28 writer
= csv
.DictWriter(csvfile
, headers
, lineterminator
="\n")
30 writer
.writerows(items
)
32 # This will return True if all values are true.
33 # Not sure what this is about
35 #for v in row.values():
36 # if 'SPR' in v: # skip all SPRs
38 for v
in row
.values():
43 # General purpose registers have names like: RA, RT, R1, ...
44 # Floating point registers names like: FRT, FRA, FR1, ..., FRTp, ...
45 # Return True if field is a register
47 return (field
.startswith('R') or field
.startswith('FR') or
51 # These are the attributes of the instructions,
53 keycolumns
= ['unit', 'in1', 'in2', 'in3', 'out', 'CR in', 'CR out',
54 ] # don't think we need these: 'ldst len', 'rc', 'lk']
56 tablecols
= ['unit', 'in', 'outcnt', 'CR in', 'CR out', 'imm'
57 ] # don't think we need these: 'ldst len', 'rc', 'lk']
62 for key
in keycolumns
:
63 # registers IN - special-case: count number of regs RA/RB/RC/RS
64 if key
in ['in1', 'in2', 'in3']:
67 if row
['unit'] == 'BRANCH': # branches must not include Vector SPRs
74 # If upd is 1 then increment the count of outputs
75 if 'outcnt' not in res
:
82 # CRs (Condition Register) (CR0 .. CR7)
83 if key
.startswith('CR'):
84 if row
[key
].startswith('NONE'):
88 if row
['comment'].startswith('cr'):
92 if row
[key
] == 'LDST': # we care about LDST units
96 # LDST len (LoadStore length)
97 if key
.startswith('ldst'):
98 if row
[key
].startswith('NONE'):
103 if key
in ['rc', 'lk']:
104 if row
[key
] == 'ONE':
106 elif row
[key
] == 'NONE':
113 # Convert the numerics 'in' & 'outcnt' to strings
114 res
['in'] = str(res
['in'])
115 res
['outcnt'] = str(res
['outcnt'])
119 if row
['in2'].startswith('CONST_'):
120 res
['imm'] = "1" # row['in2'].split("_")[1]
129 for k
, v
in d
.items():
130 res
.append("%s: %s" % (k
, v
))
134 return ' | '.join(d
) + " |"
138 if row
['unit'] != 'OTHER':
139 res
.append(row
['unit'])
141 res
.append('%sR' % row
['in'])
142 if row
['outcnt'] != '0':
143 res
.append('%sW' % row
['outcnt'])
144 if row
['CR in'] == '1' and row
['CR out'] == '1':
146 res
.append("CR=2R1W")
149 elif row
['CR in'] == '1':
151 elif row
['CR out'] == '1':
153 elif 'imm' in row
and row
['imm']:
163 dictkeys
= OrderedDict()
165 insns
= {} # dictionary of CSV row, by instruction
168 print ("# OpenPOWER ISA register 'profile's")
170 print ("this page is auto-generated, do not edit")
171 print ("created by http://libre-soc.org/openpower/sv_analysis.py")
174 # Expand that (all .csv files)
175 pth
= find_wiki_file("*.csv")
177 # Ignore those containing: valid test sprs
178 for fname
in glob(pth
):
179 print ("sv analysis checking", fname
)
180 _
, name
= os
.path
.split(fname
)
187 if fname
.endswith('sprs.csv'):
189 if fname
.endswith('minor_19_valid.csv'):
193 csvname
= os
.path
.split(fname
)[1]
194 csvname_
= csvname
.split(".")[0]
195 # csvname is something like: minor_59.csv, fname the whole path
198 csvs_svp64
[csvname_
] = []
203 insn_name
= row
['comment']
204 condition
= row
['CONDITIONS']
205 # skip instructions that are not suitable
206 if insn_name
.startswith("l") and insn_name
.endswith("br"):
207 continue # skip pseudo-alias lxxxbr
208 if insn_name
in ['mcrxr', 'mcrxrx', 'darn']:
210 if insn_name
in ['bctar', 'bcctr']:
212 if 'rfid' in insn_name
:
214 if insn_name
in ['setvl',]: # SVP64 opcodes
217 insns
[(insn_name
, condition
)] = row
# accumulate csv data
218 insn_to_csv
[insn_name
] = csvname_
# CSV file name by instruction
219 dkey
= create_key(row
)
220 key
= tuple(dkey
.values())
226 bykey
[key
].append((csvname
, row
['opcode'], insn_name
, condition
,
227 row
['form'].upper() + '-Form'))
229 # detect immediates, collate them (useful info)
230 if row
['in2'].startswith('CONST_'):
231 imm
= row
['in2'].split("_")[1]
232 if key
not in immediates
:
233 immediates
[key
] = set()
234 immediates
[key
].add(imm
)
236 primarykeys
= list(primarykeys
)
239 # mapping to old SVPrefix "Forms"
240 mapsto
= {'3R-1W-CRo': 'RM-1P-3S1D',
241 '2R-1W-CRio': 'RM-1P-2S1D',
242 '2R-1W-CRi': 'RM-1P-3S1D',
243 '2R-1W-CRo': 'RM-1P-2S1D',
245 '2R-1W': 'RM-1P-2S1D',
246 '1R-CRio': 'RM-2P-2S1D',
247 '2R-CRio': 'RM-1P-2S1D',
248 '2R-CRo': 'RM-1P-2S1D',
250 '1R-1W-CRio': 'RM-2P-1S1D',
251 '1R-1W-CRo': 'RM-2P-1S1D',
252 '1R-1W': 'RM-2P-1S1D',
253 '1R-1W-imm': 'RM-2P-1S1D',
254 '1R-CRo': 'RM-2P-1S1D',
256 '1W-CRo': 'RM-1P-1D',
258 '1W-CRi': 'RM-2P-1S1D',
259 'CRio': 'RM-2P-1S1D',
260 'CR=2R1W': 'RM-1P-2S1D',
264 'LDST-2R-imm': 'LDSTRM-2P-2S',
265 'LDST-2R-1W-imm': 'LDSTRM-2P-2S1D',
266 'LDST-2R-1W': 'LDSTRM-2P-2S1D',
267 'LDST-2R-2W': 'LDSTRM-2P-2S1D',
268 'LDST-1R-1W-imm': 'LDSTRM-2P-1S1D',
269 'LDST-1R-2W-imm': 'LDSTRM-2P-1S2D',
270 'LDST-3R': 'LDSTRM-2P-3S',
271 'LDST-3R-CRo': 'LDSTRM-2P-3S', # st*x
272 'LDST-3R-1W': 'LDSTRM-2P-2S1D', # st*x
274 print ("# map to old SV Prefix")
276 print ('[[!table data="""')
277 for key
in primarykeys
:
278 name
= keyname(dictkeys
[key
])
279 value
= mapsto
.get(name
, "-")
280 print (tformat([name
, value
+ " "]))
286 print ('[[!table data="""')
287 print (tformat(tablecols
) + " imms | name |")
289 # print out the keys and the table from which they're derived
290 for key
in primarykeys
:
291 name
= keyname(dictkeys
[key
])
292 row
= tformat(dictkeys
[key
].values())
293 imms
= list(immediates
.get(key
, ""))
295 row
+= " %s | " % ("/".join(imms
))
296 row
+= " %s |" % name
301 # print out, by remap name, all the instructions under that category
302 for key
in primarykeys
:
303 name
= keyname(dictkeys
[key
])
304 value
= mapsto
.get(name
, "-")
305 print ("## %s (%s)" % (name
, value
))
307 print ('[[!table data="""')
308 print (tformat(['CSV', 'opcode', 'asm', 'form']))
316 #for fname, csv in csvs.items():
319 #for insn, row in insns.items():
322 print ("# svp64 remaps")
323 svp64
= OrderedDict()
324 # create a CSV file, per category, with SV "augmentation" info
325 # XXX note: 'out2' not added here, needs to be added to CSV files
326 # KEEP TRACK OF THESE https://bugs.libre-soc.org/show_bug.cgi?id=619
327 csvcols
= ['insn', 'CONDITIONS', 'Ptype', 'Etype', '0', '1', '2', '3']
328 csvcols
+= ['in1', 'in2', 'in3', 'out', 'CR in', 'CR out'] # temporary
329 for key
in primarykeys
:
330 # get the decoded key containing row-analysis, and name/value
333 value
= mapsto
.get(name
, "-")
334 if value
== 'non-SV':
337 # print out svp64 tables by category
338 print ("* **%s**: %s" % (name
, value
))
340 # store csv entries by svp64 RM category
341 if value
not in svp64
:
348 #for idx in range(len(row)):
349 # if row[idx] == 'NONE':
351 # get the instruction
355 insn
= insns
[(insn_name
, condition
)]
356 # start constructing svp64 CSV row
358 res
['insn'] = insn_name
359 res
['CONDITIONS'] = condition
360 res
['Ptype'] = value
.split('-')[1] # predication type (RM-xN-xxx)
361 # get whether R_xxx_EXTRAn fields are 2-bit or 3-bit
362 res
['Etype'] = 'EXTRA2'
363 # go through each register matching to Rxxxx_EXTRAx
364 for k
in ['0', '1', '2', '3']:
366 # create "fake" out2 (TODO, needs to be added to CSV files)
367 # KEEP TRACK HERE https://bugs.libre-soc.org/show_bug.cgi?id=619
369 if insn
['upd'] == '1': # LD/ST with update has RA as out2
372 # temporary useful info
374 for k
in ['in1', 'in2', 'in3', 'out', 'CR in', 'CR out']:
375 if insn
[k
].startswith('CONST'):
380 if insn
[k
] == 'RA_OR_ZERO':
382 elif insn
[k
] != 'NONE':
387 print ("regs", insn_name
, regs
)
389 # for LD/ST FP, use FRT/FRS not RT/RS, and use CR1 not CR0
390 if insn_name
.startswith("lf"):
396 if insn_name
.startswith("stf"):
403 # sigh now the fun begins. this isn't the sanest way to do it
404 # but the patterns are pretty regular.
406 if value
== 'LDSTRM-2P-1S1D':
407 res
['Etype'] = 'EXTRA3' # RM EXTRA3 type
408 res
['0'] = dRT
# RT: Rdest_EXTRA3
409 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
411 elif value
== 'LDSTRM-2P-1S2D':
412 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
413 res
['0'] = dRT
# RT: Rdest_EXTRA3
414 res
['1'] = 'd:RA' # RA: Rdest2_EXTRA2
415 res
['2'] = 's:RA' # RA: Rsrc1_EXTRA2
417 elif value
== 'LDSTRM-2P-2S':
419 res
['Etype'] = 'EXTRA3' # RM EXTRA2 type
420 res
['0'] = sRS
# RS: Rdest1_EXTRA2
421 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA2
423 elif value
== 'LDSTRM-2P-2S1D':
424 if 'st' in insn_name
and 'x' not in insn_name
: # stwu/stbu etc
425 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
426 res
['0'] = 'd:RA' # RA: Rdest1_EXTRA2
427 res
['1'] = sRS
# RS: Rdsrc1_EXTRA2
428 res
['2'] = 's:RA' # RA: Rsrc2_EXTRA2
429 elif 'st' in insn_name
and 'x' in insn_name
: # stwux
430 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
431 res
['0'] = 'd:RA' # RA: Rdest1_EXTRA2
432 res
['1'] = sRS
+'s:RA' # RS: Rdest2_EXTRA2, RA: Rsrc1_EXTRA2
433 res
['2'] = 's:RB' # RB: Rsrc2_EXTRA2
434 elif 'u' in insn_name
: # ldux etc.
435 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
436 res
['0'] = dRT
# RT: Rdest1_EXTRA2
437 res
['1'] = 'd:RA' # RA: Rdest2_EXTRA2
438 res
['2'] = 's:RB' # RB: Rsrc1_EXTRA2
440 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
441 res
['0'] = dRT
# RT: Rdest1_EXTRA2
442 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA2
443 res
['2'] = 's:RB' # RB: Rsrc2_EXTRA2
445 elif value
== 'LDSTRM-2P-3S':
446 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
447 if 'cx' in insn_name
:
448 res
['0'] = sRS
+dCR
# RS: Rsrc1_EXTRA2 CR0: dest
450 res
['0'] = sRS
# RS: Rsrc1_EXTRA2
451 res
['1'] = 's:RA' # RA: Rsrc2_EXTRA2
452 res
['2'] = 's:RB' # RA: Rsrc3_EXTRA2
454 elif value
== 'RM-2P-1S1D':
455 res
['Etype'] = 'EXTRA3' # RM EXTRA3 type
456 if insn_name
== 'mtspr':
457 res
['0'] = 'd:SPR' # SPR: Rdest1_EXTRA3
458 res
['1'] = 's:RS' # RS: Rsrc1_EXTRA3
459 elif insn_name
== 'mfspr':
460 res
['0'] = 'd:RS' # RS: Rdest1_EXTRA3
461 res
['1'] = 's:SPR' # SPR: Rsrc1_EXTRA3
462 elif name
== 'CRio' and insn_name
== 'mcrf':
463 res
['0'] = 'd:BF' # BFA: Rdest1_EXTRA3
464 res
['1'] = 's:BFA' # BFA: Rsrc1_EXTRA3
465 elif 'mfcr' in insn_name
or 'mfocrf' in insn_name
:
466 res
['0'] = 'd:RT' # RT: Rdest1_EXTRA3
467 res
['1'] = 's:CR' # CR: Rsrc1_EXTRA3
468 elif insn_name
== 'setb':
469 res
['0'] = 'd:RT' # RT: Rdest1_EXTRA3
470 res
['1'] = 's:BFA' # BFA: Rsrc1_EXTRA3
471 elif insn_name
.startswith('cmp'): # cmpi
472 res
['0'] = 'd:BF' # BF: Rdest1_EXTRA3
473 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
474 elif regs
== ['RA','','','RT','','']:
475 res
['0'] = 'd:RT' # RT: Rdest1_EXTRA3
476 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
477 elif regs
== ['RA','','','RT','','CR0']:
478 res
['0'] = 'd:RT;d:CR0' # RT,CR0: Rdest1_EXTRA3
479 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
480 elif (regs
== ['RS','','','RA','','CR0'] or
481 regs
== ['','','RS','RA','','CR0']):
482 res
['0'] = 'd:RA;d:CR0' # RA,CR0: Rdest1_EXTRA3
483 res
['1'] = 's:RS' # RS: Rsrc1_EXTRA3
484 elif regs
== ['RS','','','RA','','']:
485 res
['0'] = 'd:RA' # RA: Rdest1_EXTRA3
486 res
['1'] = 's:RS' # RS: Rsrc1_EXTRA3
487 elif regs
== ['','FRB','','FRT','0','CR1']:
488 res
['0'] = 'd:FRT;d:CR1' # FRT,CR1: Rdest1_EXTRA3
489 res
['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3
490 elif regs
== ['','FRB','','','','CR1']:
491 res
['0'] = 'd:CR1' # CR1: Rdest1_EXTRA3
492 res
['1'] = 's:FRB' # FRA: Rsrc1_EXTRA3
493 elif regs
== ['','FRB','','','','BF']:
494 res
['0'] = 'd:BF' # BF: Rdest1_EXTRA3
495 res
['1'] = 's:FRB' # FRA: Rsrc1_EXTRA3
496 elif regs
== ['','FRB','','FRT','','CR1']:
497 res
['0'] = 'd:FRT;d:CR1' # FRT,CR1: Rdest1_EXTRA3
498 res
['1'] = 's:FRB' # FRB: Rsrc1_EXTRA3
499 elif insn_name
.startswith('bc'):
500 res
['0'] = 'd:BI' # BI: Rdest1_EXTRA3
501 res
['1'] = 's:BI' # BI: Rsrc1_EXTRA3
505 elif value
== 'RM-1P-2S1D':
506 res
['Etype'] = 'EXTRA3' # RM EXTRA3 type
507 if insn_name
.startswith('cr'):
508 res
['0'] = 'd:BT' # BT: Rdest1_EXTRA3
509 res
['1'] = 's:BA' # BA: Rsrc1_EXTRA3
510 res
['2'] = 's:BB' # BB: Rsrc2_EXTRA3
511 elif regs
== ['FRA','','FRC','FRT','','CR1']:
512 res
['0'] = 'd:FRT;d:CR1' # FRT,CR1: Rdest1_EXTRA3
513 res
['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3
514 res
['2'] = 's:FRC' # FRC: Rsrc1_EXTRA3
516 elif regs
== ['FRA','FRB','','','','BF']:
517 res
['0'] = 'd:BF' # BF: Rdest1_EXTRA3
518 res
['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3
519 res
['2'] = 's:FRB' # FRB: Rsrc1_EXTRA3
520 elif regs
== ['FRA','FRB','','FRT','','']:
521 res
['0'] = 'd:FRT' # FRT: Rdest1_EXTRA3
522 res
['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3
523 res
['2'] = 's:FRB' # FRB: Rsrc1_EXTRA3
524 elif regs
== ['FRA','FRB','','FRT','','CR1']:
525 res
['0'] = 'd:FRT;d:CR1' # FRT,CR1: Rdest1_EXTRA3
526 res
['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3
527 res
['2'] = 's:FRB' # FRB: Rsrc1_EXTRA3
528 elif name
== '2R-1W' or insn_name
== 'cmpb': # cmpb
529 if insn_name
in ['bpermd', 'cmpb']:
530 res
['0'] = 'd:RA' # RA: Rdest1_EXTRA3
531 res
['1'] = 's:RS' # RS: Rsrc1_EXTRA3
533 res
['0'] = 'd:RT' # RT: Rdest1_EXTRA3
534 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
535 res
['2'] = 's:RB' # RB: Rsrc1_EXTRA3
536 elif insn_name
.startswith('cmp'): # cmp
537 res
['0'] = 'd:BF' # BF: Rdest1_EXTRA3
538 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
539 res
['2'] = 's:RB' # RB: Rsrc1_EXTRA3
540 elif (regs
== ['','RB','RS','RA','','CR0'] or
541 regs
== ['RS','RB','','RA','','CR0']):
542 res
['0'] = 'd:RA;d:CR0' # RA,CR0: Rdest1_EXTRA3
543 res
['1'] = 's:RB' # RB: Rsrc1_EXTRA3
544 res
['2'] = 's:RS' # RS: Rsrc1_EXTRA3
545 elif regs
== ['RA','RB','','RT','','CR0']:
546 res
['0'] = 'd:RT;d:CR0' # RT,CR0: Rdest1_EXTRA3
547 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
548 res
['2'] = 's:RB' # RB: Rsrc1_EXTRA3
549 elif regs
== ['RA','','RS','RA','','CR0']:
550 res
['0'] = 'd:RA;d:CR0' # RA,CR0: Rdest1_EXTRA3
551 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
552 res
['2'] = 's:RS' # RS: Rsrc1_EXTRA3
556 elif value
== 'RM-2P-2S1D':
557 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
558 if insn_name
.startswith('mt'): # mtcrf
559 res
['0'] = 'd:CR' # CR: Rdest1_EXTRA2
560 res
['1'] = 's:RS' # RS: Rsrc1_EXTRA2
561 res
['2'] = 's:CR' # CR: Rsrc2_EXTRA2
565 elif value
== 'RM-1P-3S1D':
566 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
567 if insn_name
== 'isel':
568 res
['0'] = 'd:RT' # RT: Rdest1_EXTRA2
569 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA2
570 res
['2'] = 's:RB' # RT: Rsrc2_EXTRA2
571 res
['3'] = 's:BC' # BC: Rsrc3_EXTRA2
573 res
['0'] = 'd:FRT;d:CR1' # FRT, CR1: Rdest1_EXTRA2
574 res
['1'] = 's:FRA' # FRA: Rsrc1_EXTRA2
575 res
['2'] = 's:FRB' # FRB: Rsrc2_EXTRA2
576 res
['3'] = 's:FRC' # FRC: Rsrc3_EXTRA2
578 elif value
== 'RM-1P-1D':
579 res
['Etype'] = 'EXTRA3' # RM EXTRA3 type
580 if insn_name
== 'svstep':
581 res
['0'] = 'd:RT;d:CR0' # RT,CR0: Rdest1_EXTRA2
584 #for k in ['in1', 'in2', 'in3', 'out', 'CR in', 'CR out']:
586 #if res['0'] != 'TODO':
588 if k
== 'CONDITIONS':
590 if res
[k
] == 'NONE' or res
[k
] == '':
592 svp64
[value
].append(res
)
593 # also add to by-CSV version
594 csv_fname
= insn_to_csv
[insn_name
]
595 csvs_svp64
[csv_fname
].append(res
)
599 # now write out the csv files
600 for value
, csv
in svp64
.items():
601 # print out svp64 tables by category
602 print ("## %s" % value
)
604 print ('[[!table format=csv file="openpower/isatables/%s.csv"]]' % \
608 #csvcols = ['insn', 'Ptype', 'Etype', '0', '1', '2', '3']
609 write_csv("%s.csv" % value
, csv
, csvcols
+ ['out2'])
611 # okaaay, now we re-read them back in for producing microwatt SV
613 # get SVP64 augmented CSV files
614 svt
= SVP64RM(microwatt_format
=True)
615 # Expand that (all .csv files)
616 pth
= find_wiki_file("*.csv")
618 # Ignore those containing: valid test sprs
619 for fname
in glob(pth
):
620 print ("post-checking", fname
)
621 _
, name
= os
.path
.split(fname
)
628 if fname
.endswith('sprs.csv'):
630 if fname
.endswith('minor_19_valid.csv'):
634 svp64_csv
= svt
.get_svp64_csv(fname
)
636 csvcols
= ['insn', 'Ptype', 'Etype']
637 csvcols
+= ['in1', 'in2', 'in3', 'out', 'out2', 'CR in', 'CR out']
639 # and a nice microwatt VHDL file
640 file_path
= find_wiki_file("sv_decode.vhdl")
641 with
open(file_path
, 'w') as vhdl
:
642 # autogeneration warning
643 vhdl
.write("-- this file is auto-generated, do not edit\n")
644 vhdl
.write("-- http://libre-soc.org/openpower/sv_analysis.py\n")
645 vhdl
.write("-- part of Libre-SOC, sponsored by NLnet\n")
648 # first create array types
649 lens
= {'major' : 63,
660 for value
, csv
in csvs_svp64
.items():
662 value
= value
.lower()
663 value
= value
.replace("-", "_")
664 if value
not in lens
:
665 todo
= " -- TODO %s (or no SVP64 augmentation)\n"
666 vhdl
.write(todo
% value
)
669 typarray
= " type sv_%s_rom_array_t is " \
670 "array(0 to %d) of sv_decode_rom_t;\n"
671 vhdl
.write(typarray
% (value
, width
))
674 sv_cols
= ['sv_in1', 'sv_in2', 'sv_in3', 'sv_out', 'sv_out2',
675 'sv_cr_in', 'sv_cr_out']
676 fullcols
= csvcols
+ sv_cols
678 " constant sv_%s_decode_rom_array :\n" \
679 " sv_%s_rom_array_t := (\n" \
681 ftr
= " others => sv_illegal_inst\n" \
683 for value
, csv
in csvs_svp64
.items():
685 value
= value
.lower()
686 value
= value
.replace("-", "_")
687 if value
not in lens
:
689 vhdl
.write(hdr
% (value
, value
, " ".join(fullcols
)))
691 insn
= str(entry
['insn'])
692 condition
= str(entry
['CONDITIONS'])
693 sventry
= svt
.svp64_instrs
.get(insn
, None)
694 op
= insns
[(insn
, condition
)]['opcode']
695 # binary-to-vhdl-binary
696 if op
.startswith("0b"):
697 op
= "2#%s#" % op
[2:]
699 for colname
in csvcols
[1:]:
701 # zero replace with NONE
705 re
= re
.replace("1P", "P1")
706 re
= re
.replace("2P", "P2")
708 print ("sventry", sventry
)
709 for colname
in sv_cols
:
713 re
= sventry
[colname
]
716 vhdl
.write(" %13s => (%s), -- %s\n" % (op
, row
, insn
))
719 if __name__
== '__main__':