2 from openpower
.test
.common
import TestAccumulatorBase
3 from openpower
.endian
import bigendian
4 from openpower
.simulator
.program
import Program
5 from openpower
.decoder
.selectable_int
import SelectableInt
6 from openpower
.decoder
.power_enums
import XER_bits
7 from openpower
.decoder
.isa
.caller
import special_sprs
8 from openpower
.test
.state
import ExpectedState
12 class ALUTestCase(TestAccumulatorBase
):
14 def case_1_regression(self
):
16 initial_regs
= [0] * 32
17 initial_regs
[1] = 0xb6a1fc6c8576af91
18 e
= ExpectedState(pc
=4)
19 e
.intregs
[1] = 0xb6a1fc6c8576af91
20 e
.intregs
[3] = 0xffffffff8576af91
21 self
.add_case(Program(lst
, bigendian
), initial_regs
, expected
=e
)
22 lst
= [f
"subf 3, 1, 2"]
23 initial_regs
= [0] * 32
24 initial_regs
[1] = 0x3d7f3f7ca24bac7b
25 initial_regs
[2] = 0xf6b2ac5e13ee15c2
26 e
= ExpectedState(pc
=4)
27 e
.intregs
[1] = 0x3d7f3f7ca24bac7b
28 e
.intregs
[2] = 0xf6b2ac5e13ee15c2
29 e
.intregs
[3] = 0xb9336ce171a26947
30 self
.add_case(Program(lst
, bigendian
), initial_regs
, expected
=e
)
31 lst
= [f
"subf 3, 1, 2"]
32 initial_regs
= [0] * 32
33 initial_regs
[1] = 0x833652d96c7c0058
34 initial_regs
[2] = 0x1c27ecff8a086c1a
35 e
= ExpectedState(pc
=4)
36 e
.intregs
[1] = 0x833652d96c7c0058
37 e
.intregs
[2] = 0x1c27ecff8a086c1a
38 e
.intregs
[3] = 0x98f19a261d8c6bc2
39 self
.add_case(Program(lst
, bigendian
), initial_regs
, expected
=e
)
41 initial_regs
= [0] * 32
42 initial_regs
[1] = 0x7f9497aaff900ea0
43 e
= ExpectedState(pc
=4)
44 e
.intregs
[1] = 0x7f9497aaff900ea0
45 e
.intregs
[3] = 0xffffffffffffffa0
46 self
.add_case(Program(lst
, bigendian
), initial_regs
, expected
=e
)
47 lst
= [f
"add. 3, 1, 2"]
48 initial_regs
= [0] * 32
49 initial_regs
[1] = 0xc523e996a8ff6215
50 initial_regs
[2] = 0xe1e5b9cc9864c4a8
51 self
.add_case(Program(lst
, bigendian
), initial_regs
)
52 lst
= [f
"add 3, 1, 2"]
53 initial_regs
= [0] * 32
54 initial_regs
[1] = 0x2e08ae202742baf8
55 initial_regs
[2] = 0x86c43ece9efe5baa
56 e
= ExpectedState(pc
=4)
57 e
.intregs
[1] = 0x2e08ae202742baf8
58 e
.intregs
[2] = 0x86c43ece9efe5baa
59 e
.intregs
[3] = 0xb4cceceec64116a2
60 self
.add_case(Program(lst
, bigendian
), initial_regs
, expected
=e
)
63 insns
= ["add", "add.", "subf"]
65 choice
= random
.choice(insns
)
66 lst
= [f
"{choice} 3, 1, 2"]
67 initial_regs
= [0] * 32
68 initial_regs
[1] = random
.randint(0, (1 << 64)-1)
69 initial_regs
[2] = random
.randint(0, (1 << 64)-1)
70 self
.add_case(Program(lst
, bigendian
), initial_regs
)
72 def case_addme_ca_0(self
):
73 insns
= ["addme", "addme.", "addmeo", "addmeo."]
75 lst
= [f
"{choice} 6, 16"]
76 for value
in [0x7ffffffff,
78 initial_regs
= [0] * 32
79 initial_regs
[16] = value
81 xer
= SelectableInt(0, 64)
82 xer
[XER_bits
['CA']] = 0
83 initial_sprs
[special_sprs
['XER']] = xer
84 self
.add_case(Program(lst
, bigendian
),
85 initial_regs
, initial_sprs
)
87 def case_addme_ca_1(self
):
88 insns
= ["addme", "addme.", "addmeo", "addmeo."]
90 lst
= [f
"{choice} 6, 16"]
91 for value
in [0x7ffffffff, # fails, bug #476
93 initial_regs
= [0] * 32
94 initial_regs
[16] = value
96 xer
= SelectableInt(0, 64)
97 xer
[XER_bits
['CA']] = 1
98 initial_sprs
[special_sprs
['XER']] = xer
99 self
.add_case(Program(lst
, bigendian
),
100 initial_regs
, initial_sprs
)
102 def case_addme_ca_so_3(self
):
103 """bug where SO does not get passed through to CR0
105 lst
= ["addme. 6, 16"]
106 initial_regs
= [0] * 32
107 initial_regs
[16] = 0x7ffffffff
109 xer
= SelectableInt(0, 64)
110 xer
[XER_bits
['CA']] = 1
111 xer
[XER_bits
['SO']] = 1
112 initial_sprs
[special_sprs
['XER']] = xer
113 self
.add_case(Program(lst
, bigendian
),
114 initial_regs
, initial_sprs
)
116 def case_addze(self
):
117 insns
= ["addze", "addze.", "addzeo", "addzeo."]
119 lst
= [f
"{choice} 6, 16"]
120 initial_regs
= [0] * 32
121 initial_regs
[16] = 0x00ff00ff00ff0080
122 if choice
== "addze":
123 e
= ExpectedState(pc
=4)
124 e
.intregs
[6] = 0xff00ff00ff0080
125 e
.intregs
[16] = 0xff00ff00ff0080
126 self
.add_case(Program(lst
, bigendian
), initial_regs
, expected
=e
)
128 self
.add_case(Program(lst
, bigendian
), initial_regs
)
130 def case_addis_nonzero_r0_regression(self
):
131 lst
= [f
"addis 3, 0, 1"]
133 initial_regs
= [0] * 32
135 e
= ExpectedState(initial_regs
, pc
=4)
136 e
.intregs
[3] = 0x10000
137 self
.add_case(Program(lst
, bigendian
), initial_regs
, expected
=e
)
139 def case_addis_nonzero_r0(self
):
141 imm
= random
.randint(-(1 << 15), (1 << 15)-1)
142 lst
= [f
"addis 3, 0, {imm}"]
144 initial_regs
= [0] * 32
145 initial_regs
[0] = random
.randint(0, (1 << 64)-1)
146 self
.add_case(Program(lst
, bigendian
), initial_regs
)
148 def case_rand_imm(self
):
149 insns
= ["addi", "addis", "subfic"]
151 choice
= random
.choice(insns
)
152 imm
= random
.randint(-(1 << 15), (1 << 15)-1)
153 lst
= [f
"{choice} 3, 1, {imm}"]
155 initial_regs
= [0] * 32
156 initial_regs
[1] = random
.randint(0, (1 << 64)-1)
157 self
.add_case(Program(lst
, bigendian
), initial_regs
)
159 def case_0_adde(self
):
160 lst
= ["adde. 5, 6, 7"]
162 initial_regs
= [0] * 32
163 initial_regs
[6] = random
.randint(0, (1 << 64)-1)
164 initial_regs
[7] = random
.randint(0, (1 << 64)-1)
166 xer
= SelectableInt(0, 64)
167 xer
[XER_bits
['CA']] = 1
168 initial_sprs
[special_sprs
['XER']] = xer
169 self
.add_case(Program(lst
, bigendian
),
170 initial_regs
, initial_sprs
)
173 lst
= ["subf. 1, 6, 7",
175 initial_regs
= [0] * 32
176 initial_regs
[6] = 0x10
177 initial_regs
[7] = 0x05
178 self
.add_case(Program(lst
, bigendian
), initial_regs
, {})
181 lst
= ["cmp cr2, 0, 2, 3"]
182 initial_regs
= [0] * 32
183 initial_regs
[2] = 0xffffffffaaaaaaaa
184 initial_regs
[3] = 0x00000000aaaaaaaa
185 self
.add_case(Program(lst
, bigendian
), initial_regs
, {})
187 lst
= ["cmp cr2, 0, 4, 5"]
188 initial_regs
= [0] * 32
189 initial_regs
[4] = 0x00000000aaaaaaaa
190 initial_regs
[5] = 0xffffffffaaaaaaaa
191 self
.add_case(Program(lst
, bigendian
), initial_regs
, {})
194 lst
= ["cmp cr2, 1, 2, 3"]
195 initial_regs
= [0] * 32
196 initial_regs
[2] = 0xffffffffaaaaaaaa
197 initial_regs
[3] = 0x00000000aaaaaaaa
198 self
.add_case(Program(lst
, bigendian
), initial_regs
, {})
200 lst
= ["cmp cr2, 1, 4, 5"]
201 initial_regs
= [0] * 32
202 initial_regs
[4] = 0x00000000aaaaaaaa
203 initial_regs
[5] = 0xffffffffaaaaaaaa
204 self
.add_case(Program(lst
, bigendian
), initial_regs
, {})
206 def case_cmpl_microwatt_0(self
):
208 115b8: 40 50 d1 7c .long 0x7cd15040 # cmpl 6, 0, 17, 10
209 register_file.vhdl: Reading GPR 11 000000000001C026
210 register_file.vhdl: Reading GPR 0A FEDF3FFF0001C025
211 cr_file.vhdl: Reading CR 35055050
212 cr_file.vhdl: Writing 35055058 to CR mask 01 35055058
215 lst
= ["cmpl 6, 0, 17, 10"]
216 initial_regs
= [0] * 32
217 initial_regs
[0x11] = 0x1c026
218 initial_regs
[0xa] = 0xFEDF3FFF0001C025
222 self
.add_case(Program(lst
, bigendian
), initial_regs
,
223 initial_sprs
= {'XER': XER
},
226 def case_cmpl_microwatt_0_disasm(self
):
227 """microwatt 1.bin: disassembled version
228 115b8: 40 50 d1 7c .long 0x7cd15040 # cmpl 6, 0, 17, 10
229 register_file.vhdl: Reading GPR 11 000000000001C026
230 register_file.vhdl: Reading GPR 0A FEDF3FFF0001C025
231 cr_file.vhdl: Reading CR 35055050
232 cr_file.vhdl: Writing 35055058 to CR mask 01 35055058
235 dis
= ["cmpl 6, 0, 17, 10"]
236 lst
= bytes([0x40, 0x50, 0xd1, 0x7c]) # 0x7cd15040
237 initial_regs
= [0] * 32
238 initial_regs
[0x11] = 0x1c026
239 initial_regs
[0xa] = 0xFEDF3FFF0001C025
243 p
= Program(lst
, bigendian
)
244 p
.assembly
= '\n'.join(dis
)+'\n'
245 self
.add_case(p
, initial_regs
,
246 initial_sprs
= {'XER': XER
},
249 def case_cmplw_microwatt_1(self
):
251 10d94: 40 20 96 7c cmplw cr1,r22,r4
252 gpr: 00000000ffff6dc1 <- r4
253 gpr: 0000000000000000 <- r22
256 lst
= ["cmpl 1, 0, 22, 4"]
257 initial_regs
= [0] * 32
258 initial_regs
[4] = 0xffff6dc1
263 self
.add_case(Program(lst
, bigendian
), initial_regs
,
264 initial_sprs
= {'XER': XER
},
267 def case_cmpli_microwatt(self
):
268 """microwatt 1.bin: cmpli
269 123ac: 9c 79 8d 2a cmpli cr5,0,r13,31132
270 gpr: 00000000301fc7a7 <- r13
271 cr : 0000000090215393
272 xer: so 1 ca 0 32 0 ov 0 32 0
276 lst
= ["cmpli 5, 0, 13, 31132"]
277 initial_regs
= [0] * 32
278 initial_regs
[13] = 0x301fc7a7
282 self
.add_case(Program(lst
, bigendian
), initial_regs
,
283 initial_sprs
= {'XER': XER
},
286 def case_extsb(self
):
287 insns
= ["extsb", "extsh", "extsw"]
289 choice
= random
.choice(insns
)
290 lst
= [f
"{choice} 3, 1"]
292 initial_regs
= [0] * 32
293 initial_regs
[1] = random
.randint(0, (1 << 64)-1)
294 self
.add_case(Program(lst
, bigendian
), initial_regs
)
296 def case_cmpeqb(self
):
297 lst
= ["cmpeqb cr1, 1, 2"]
299 initial_regs
= [0] * 32
301 initial_regs
[2] = 0x0001030507090b0f
302 self
.add_case(Program(lst
, bigendian
), initial_regs
, {})