src/openpower/test/bitmanip/av_cases.py

   1 from openpower.sv.trans.svp64 import SVP64Asm
   2 import random
   3 from openpower.test.common import TestAccumulatorBase
   4 from openpower.endian import bigendian
   5 from openpower.simulator.program import Program
   6 from openpower.decoder.selectable_int import SelectableInt
   7 from openpower.decoder.power_enums import XER_bits
   8 from openpower.decoder.isa.caller import special_sprs
   9 from openpower.decoder.helpers import exts
  10 from openpower.test.state import ExpectedState
  11 import unittest
  12
  13
  14 class AVTestCase(TestAccumulatorBase):
  15
  16     def case_0_maxs(self):
  17         lst = ["maxs 3, 1, 2"]
  18         lst = list(SVP64Asm(lst, bigendian))
  19
  20         initial_regs = [0] * 32
  21         initial_regs[1] = 0xc523e996a8ff6215
  22         initial_regs[2] = 0xe1e5b9cc9864c4a8
  23         e = ExpectedState(pc=4)
  24         e.intregs[1] = 0xc523e996a8ff6215
  25         e.intregs[2] = 0xe1e5b9cc9864c4a8
  26         e.intregs[3] = 0xe1e5b9cc9864c4a8
  27         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
  28
  29     def case_1_maxs(self):
  30         lst = ["maxs 3, 1, 2"]
  31         lst = list(SVP64Asm(lst, bigendian))
  32
  33         initial_regs = [0] * 32
  34         initial_regs[1] = 0xe1e5b9cc9864c4a8
  35         initial_regs[2] = 0xc523e996a8ff6215
  36         e = ExpectedState(pc=4)
  37         e.intregs[1] = 0xe1e5b9cc9864c4a8
  38         e.intregs[2] = 0xc523e996a8ff6215
  39         e.intregs[3] = 0xe1e5b9cc9864c4a8
  40         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
  41
  42     def case_2_maxs_(self):
  43         lst = [f"maxs. 3, 1, 2"]
  44         lst = list(SVP64Asm(lst, bigendian))
  45
  46         initial_regs = [0] * 32
  47         initial_regs[1] = 0xc523e996a8ff6215
  48         initial_regs[2] = 0xe1e5b9cc9864c4a8
  49         e = ExpectedState(pc=4)
  50         e.intregs[1] = 0xc523e996a8ff6215
  51         e.intregs[2] = 0xe1e5b9cc9864c4a8
  52         e.intregs[3] = 0xe1e5b9cc9864c4a8
  53         e.crregs[0] = 0x8
  54         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
  55
  56     def case_3_maxs_(self):
  57         lst = [f"maxs. 3, 1, 2"]
  58         lst = list(SVP64Asm(lst, bigendian))
  59
  60         initial_regs = [0] * 32
  61         initial_regs[1] = 0xc523e996a8ff6215
  62         initial_regs[2] = 0
  63         e = ExpectedState(pc=4)
  64         e.intregs[1] = 0xc523e996a8ff6215
  65         e.intregs[2] = 0
  66         e.intregs[3] = 0
  67         e.crregs[0] = 0x2 # RT is zero
  68         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
  69
  70     def case_4_maxs_(self):
  71         lst = [f"maxs. 3, 1, 2"]
  72         lst = list(SVP64Asm(lst, bigendian))
  73
  74         initial_regs = [0] * 32
  75         initial_regs[1] = 1
  76         initial_regs[2] = 0
  77         e = ExpectedState(pc=4)
  78         e.intregs[1] = 1
  79         e.intregs[2] = 0
  80         e.intregs[3] = 1
  81         e.crregs[0] = 0x4 # RT is +ve
  82         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
  83
  84     def case_5_maxs_(self):
  85         """max negative number compared against +ve number
  86         """
  87         lst = [f"maxs. 3, 1, 2"]
  88         lst = list(SVP64Asm(lst, bigendian))
  89
  90         initial_regs = [0] * 32
  91         initial_regs[1] = 1
  92         initial_regs[2] = 0x8000_0000_0000_0000
  93         e = ExpectedState(pc=4)
  94         e.intregs[1] = 1
  95         e.intregs[2] = 0x8000_0000_0000_0000
  96         e.intregs[3] = 1
  97         e.crregs[0] = 0x4 # RT is +ve
  98         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
  99
 100     def case_0_mins(self):
 101         lst = ["mins 3, 1, 2"]
 102         lst = list(SVP64Asm(lst, bigendian))
 103
 104         initial_regs = [0] * 32
 105         initial_regs[1] = 0xc523e996a8ff6215
 106         initial_regs[2] = 0xe1e5b9cc9864c4a8
 107         e = ExpectedState(pc=4)
 108         e.intregs[1] = 0xc523e996a8ff6215
 109         e.intregs[2] = 0xe1e5b9cc9864c4a8
 110         e.intregs[3] = 0xc523e996a8ff6215
 111         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 112
 113     def case_2_mins_(self):
 114         lst = [f"mins. 3, 1, 2"]
 115         lst = list(SVP64Asm(lst, bigendian))
 116
 117         initial_regs = [0] * 32
 118         initial_regs[1] = 0xc523e996a8ff6215
 119         initial_regs[2] = 0xe1e5b9cc9864c4a8
 120         e = ExpectedState(pc=4)
 121         e.intregs[1] = 0xc523e996a8ff6215
 122         e.intregs[2] = 0xe1e5b9cc9864c4a8
 123         e.intregs[3] = 0xc523e996a8ff6215
 124         e.crregs[0] = 0x8
 125         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 126
 127     def case_5_mins_(self):
 128         """min negative number compared against +ve number
 129         """
 130         lst = [f"mins. 3, 1, 2"]
 131         lst = list(SVP64Asm(lst, bigendian))
 132
 133         initial_regs = [0] * 32
 134         initial_regs[1] = 1
 135         initial_regs[2] = 0x8000_0000_0000_0000
 136         e = ExpectedState(pc=4)
 137         e.intregs[1] = 1
 138         e.intregs[2] = 0x8000_0000_0000_0000
 139         e.intregs[3] = 0x8000_0000_0000_0000
 140         e.crregs[0] = 0x8 # RT is -ve
 141         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 142
 143     def case_0_maxu(self):
 144         lst = ["maxu 3, 1, 2"]
 145         lst = list(SVP64Asm(lst, bigendian))
 146
 147         initial_regs = [0] * 32
 148         initial_regs[1] = 0xc523e996a8ff6215
 149         initial_regs[2] = 0xe1e5b9cc9864c4a8
 150         e = ExpectedState(pc=4)
 151         e.intregs[1] = 0xc523e996a8ff6215
 152         e.intregs[2] = 0xe1e5b9cc9864c4a8
 153         e.intregs[3] = 0xe1e5b9cc9864c4a8
 154         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 155
 156     def case_5_minu_(self):
 157         """min +ve numbers
 158         """
 159         lst = [f"minu. 3, 1, 2"]
 160         lst = list(SVP64Asm(lst, bigendian))
 161
 162         initial_regs = [0] * 32
 163         initial_regs[1] = 1
 164         initial_regs[2] = 0x8000_0000_0000_0000
 165         e = ExpectedState(pc=4)
 166         e.intregs[1] = 1
 167         e.intregs[2] = 0x8000_0000_0000_0000
 168         e.intregs[3] = min(e.intregs[1], e.intregs[2])
 169         e.crregs[0] = 0x4
 170         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 171
 172     def case_0_avgadd(self):
 173         lst = ["avgadd 3, 1, 2"]
 174         lst = list(SVP64Asm(lst, bigendian))
 175
 176         initial_regs = [0] * 32
 177         initial_regs[1] = 0xc523e996a8ff6215
 178         initial_regs[2] = 0xe1e5b9cc9864c4a8
 179         e = ExpectedState(pc=4)
 180         e.intregs[1] = 0xc523e996a8ff6215
 181         e.intregs[2] = 0xe1e5b9cc9864c4a8
 182         e.intregs[3] = 0xd384d1b1a0b2135f
 183         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 184
 185     def case_1_avgadd(self):
 186         lst = ["avgadd 3, 1, 2"]
 187         lst = list(SVP64Asm(lst, bigendian))
 188
 189         initial_regs = [0] * 32
 190         initial_regs[1] = 0xc523e996a8ff6214
 191         initial_regs[2] = 0xe1e5b9cc9864c4a8
 192         e = ExpectedState(pc=4)
 193         e.intregs[1] = 0xc523e996a8ff6214
 194         e.intregs[2] = 0xe1e5b9cc9864c4a8
 195         e.intregs[3] = 0xd384d1b1a0b2135e
 196         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 197
 198     def case_2_avgadd(self):
 199         lst = ["avgadd 3, 1, 2"]
 200         lst = list(SVP64Asm(lst, bigendian))
 201
 202         initial_regs = [0] * 32
 203         initial_regs[1] = 0xc523e996a8ff6213
 204         initial_regs[2] = 0xe1e5b9cc9864c4a8
 205         e = ExpectedState(pc=4)
 206         e.intregs[1] = 0xc523e996a8ff6213
 207         e.intregs[2] = 0xe1e5b9cc9864c4a8
 208         e.intregs[3] = 0xd384d1b1a0b2135e
 209         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 210
 211     def case_3_avgadd(self):
 212         lst = ["avgadd 3, 1, 2"]
 213         lst = list(SVP64Asm(lst, bigendian))
 214
 215         initial_regs = [0] * 32
 216         initial_regs[1] = 0xffffffffffffffff
 217         initial_regs[2] = 0xffffffffffffffff
 218         e = ExpectedState(pc=4)
 219         e.intregs[1] = 0xffffffffffffffff
 220         e.intregs[2] = 0xffffffffffffffff
 221         e.intregs[3] = 0xffffffffffffffff
 222         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 223
 224     def case_0_absds(self):
 225         lst = ["absds 3, 1, 2"]
 226         lst = list(SVP64Asm(lst, bigendian))
 227
 228         initial_regs = [0] * 32
 229         initial_regs[1] = 0x1
 230         initial_regs[2] = 0x2
 231         e = ExpectedState(pc=4)
 232         e.intregs[1] = 0x1
 233         e.intregs[2] = 0x2
 234         e.intregs[3] = 0x1
 235         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 236
 237     def case_1_absds(self):
 238         lst = ["absds 3, 1, 2"]
 239         lst = list(SVP64Asm(lst, bigendian))
 240
 241         initial_regs = [0] * 32
 242         initial_regs[1] = 0xffffffffffffffff
 243         initial_regs[2] = 0x2
 244         e = ExpectedState(pc=4)
 245         e.intregs[1] = 0xffffffffffffffff
 246         e.intregs[2] = 0x2
 247         e.intregs[3] = 0x3
 248         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 249
 250     def case_0_absdu(self):
 251         lst = ["absdu 3, 1, 2"]
 252         lst = list(SVP64Asm(lst, bigendian))
 253
 254         initial_regs = [0] * 32
 255         initial_regs[1] = 0x1
 256         initial_regs[2] = 0x2
 257         e = ExpectedState(pc=4)
 258         e.intregs[1] = 0x1
 259         e.intregs[2] = 0x2
 260         e.intregs[3] = 0x1
 261         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 262
 263     def case_1_absdu(self):
 264         lst = ["absdu 3, 1, 2"]
 265         lst = list(SVP64Asm(lst, bigendian))
 266
 267         initial_regs = [0] * 32
 268         initial_regs[1] = 0xffffffffffffffff
 269         initial_regs[2] = 0x2
 270         e = ExpectedState(pc=4)
 271         e.intregs[1] = 0xffffffffffffffff
 272         e.intregs[2] = 0x2
 273         e.intregs[3] = 0xfffffffffffffffd
 274         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 275
 276     def case_2_absdu(self):
 277         lst = ["absdu 3, 1, 2"]
 278         lst = list(SVP64Asm(lst, bigendian))
 279
 280         initial_regs = [0] * 32
 281         initial_regs[1] = 0x2
 282         initial_regs[2] = 0xffffffffffffffff
 283         e = ExpectedState(pc=4)
 284         e.intregs[1] = 0x2
 285         e.intregs[2] = 0xffffffffffffffff
 286         e.intregs[3] = 0xfffffffffffffffd
 287         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 288
 289     def case_0_absdacu(self):
 290         lst = ["absdacu 3, 1, 2",
 291                "absdacu 3, 4, 5",
 292         ]
 293         lst = list(SVP64Asm(lst, bigendian))
 294
 295         initial_regs = [0] * 32
 296         initial_regs[1] = 0x2
 297         initial_regs[2] = 0x1
 298         initial_regs[4] = 0x9
 299         initial_regs[5] = 0x3
 300         e = ExpectedState(pc=8)
 301         e.intregs[1] = 0x2
 302         e.intregs[2] = 0x1
 303         e.intregs[3] = 0x7
 304         e.intregs[4] = 0x9
 305         e.intregs[5] = 0x3
 306         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 307
 308     def case_1_absdacu(self):
 309         lst = ["absdacu 3, 1, 2",
 310                "absdacu 3, 4, 5",
 311         ]
 312         lst = list(SVP64Asm(lst, bigendian))
 313
 314         initial_regs = [0] * 32
 315         initial_regs[1] = 0x1
 316         initial_regs[2] = 0x2
 317         initial_regs[4] = 0x9
 318         initial_regs[5] = 0x3
 319         e = ExpectedState(pc=8)
 320         e.intregs[1] = 0x1
 321         e.intregs[2] = 0x2
 322         e.intregs[3] = 0x7
 323         e.intregs[4] = 0x9
 324         e.intregs[5] = 0x3
 325         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 326
 327     def case_2_absdacu(self):
 328         """weird case where there's a negative number
 329         * -1 is greater than 2 (as an unsigned number)
 330           therefore difference is (-1)-(2) which is -3
 331           RT=RT+-3
 332             =0-3
 333             =-3
 334         * 9 is greater than 3
 335           therefore differences is (9)-(3) which is 6
 336           RT=RT+6
 337             =-3+6
 338             =3
 339         * answer: RT=3
 340         """
 341         lst = ["absdacu 3, 1, 2",
 342                "absdacu 3, 4, 5",
 343         ]
 344         lst = list(SVP64Asm(lst, bigendian))
 345
 346         initial_regs = [0] * 32
 347         initial_regs[1] = 0x2
 348         initial_regs[2] = 0xffffffffffffffff
 349         initial_regs[4] = 0x9
 350         initial_regs[5] = 0x3
 351         e = ExpectedState(pc=8)
 352         e.intregs[1] = 0x2
 353         e.intregs[2] = 0xffffffffffffffff
 354         e.intregs[3] = 0x3 # ((-1)-(2)) + ((9)-(3))
 355         e.intregs[4] = 0x9
 356         e.intregs[5] = 0x3
 357         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 358
 359     def case_0_absdacs(self):
 360         lst = ["absdacs 3, 1, 2",
 361                "absdacs 3, 4, 5",
 362         ]
 363         lst = list(SVP64Asm(lst, bigendian))
 364
 365         initial_regs = [0] * 32
 366         initial_regs[1] = 0x2
 367         initial_regs[2] = 0x1
 368         initial_regs[4] = 0x9
 369         initial_regs[5] = 0x3
 370         e = ExpectedState(pc=8)
 371         e.intregs[1] = 0x2
 372         e.intregs[2] = 0x1
 373         e.intregs[3] = 0x7
 374         e.intregs[4] = 0x9
 375         e.intregs[5] = 0x3
 376         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 377
 378     def case_2_absdacs(self):
 379         """unlike the absdacu weird case, the 0xfff is treated as signed
 380         so (2) < (-1) and the difference is (2--1)=3.  next instruction
 381         adds 6 more.  answer: 9
 382         """
 383         lst = ["absdacs 3, 1, 2",
 384                "absdacs 3, 4, 5",
 385         ]
 386         lst = list(SVP64Asm(lst, bigendian))
 387
 388         initial_regs = [0] * 32
 389         initial_regs[1] = 0x2
 390         initial_regs[2] = 0xffffffffffffffff
 391         initial_regs[4] = 0x9
 392         initial_regs[5] = 0x3
 393         e = ExpectedState(pc=8)
 394         e.intregs[1] = 0x2
 395         e.intregs[2] = 0xffffffffffffffff
 396         e.intregs[3] = 9
 397         e.intregs[4] = 0x9
 398         e.intregs[5] = 0x3
 399         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 400
 401     def case_0_cprop(self):
 402         lst = ["cprop 3, 1, 2" ]
 403         lst = list(SVP64Asm(lst, bigendian))
 404         last_pc = len(lst)*4
 405         reg_a = 0b000001
 406         reg_b = 0b000111
 407         reg_t = 0b001111
 408
 409         initial_regs = [0] * 32
 410         initial_regs[1] = reg_a
 411         initial_regs[2] = reg_b
 412         e = ExpectedState(pc=last_pc)
 413         e.intregs[1] = reg_a
 414         e.intregs[2] = reg_b
 415         e.intregs[3] = reg_t
 416         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 417
 418     def case_1_cprop(self):
 419         lst = ["cprop 3, 1, 2" ]
 420         lst = list(SVP64Asm(lst, bigendian))
 421         last_pc = len(lst)*4
 422         reg_a = 0b000010
 423         reg_b = 0b001111
 424         reg_t = 0b011100
 425
 426         initial_regs = [0] * 32
 427         initial_regs[1] = reg_a
 428         initial_regs[2] = reg_b
 429         e = ExpectedState(pc=last_pc)
 430         e.intregs[1] = reg_a
 431         e.intregs[2] = reg_b
 432         e.intregs[3] = reg_t
 433         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 434
 435     def case_2_cprop(self):
 436         lst = ["cprop 3, 1, 2" ]
 437         lst = list(SVP64Asm(lst, bigendian))
 438         last_pc = len(lst)*4
 439         reg_a = 0b000010
 440         reg_b = 0b001110
 441         reg_t = 0b011110
 442
 443         initial_regs = [0] * 32
 444         initial_regs[1] = reg_a
 445         initial_regs[2] = reg_b
 446         e = ExpectedState(pc=last_pc)
 447         e.intregs[1] = reg_a
 448         e.intregs[2] = reg_b
 449         e.intregs[3] = reg_t
 450         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 451
 452     def case_0_bmask(self):
 453         """
 454         https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/sv/bmask.py
 455         https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/sv/test_bmask.py
 456         https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=openpower/isa/av.mdwn;hb=HEAD
 457         SBF = 0b01010 # set before first
 458         SOF = 0b01001 # set only first
 459         SIF = 0b10000 # set including first 10011 also works no idea why yet
 460         """
 461         lst = ["bmask 3, 1, 2, 10, 0" ]
 462         lst = list(SVP64Asm(lst, bigendian))
 463         last_pc = len(lst)*4
 464         reg_a = 0b10010100
 465         reg_b = 0b11000011
 466         reg_t = 0b01000011
 467
 468         initial_regs = [0] * 32
 469         initial_regs[1] = reg_a
 470         initial_regs[2] = reg_b
 471         e = ExpectedState(pc=last_pc)
 472         e.intregs[1] = reg_a
 473         e.intregs[2] = reg_b
 474         e.intregs[3] = reg_t
 475         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 476