1 from openpower
.sv
.trans
.svp64
import SVP64Asm
2 from openpower
.test
.common
import TestAccumulatorBase
, skip_case
3 from openpower
.endian
import bigendian
4 from openpower
.simulator
.program
import Program
5 from openpower
.test
.state
import ExpectedState
6 from nmutil
.sim_util
import hash_256
9 class BitManipTestCase(TestAccumulatorBase
):
10 def do_case_ternlogi(self
, rc
, rt
, ra
, rb
, imm
):
11 rc_dot
= "." if rc
else ""
12 lst
= [f
"ternlogi{rc_dot} 3, 4, 5, {imm}"]
13 initial_regs
= [0] * 32
20 lst
= list(SVP64Asm(lst
, bigendian
))
21 e
= ExpectedState(pc
=4)
31 if imm
& 2 ** lut_index
:
33 e
.intregs
[3] = expected
37 if expected
& 2 ** 63: # sign extend
42 e
.crregs
[0] = (eq
<< 1) |
(gt
<< 2) |
(lt
<< 3)
43 self
.add_case(Program(lst
, bigendian
), initial_regs
, expected
=e
)
45 def do_case_grev(self
, w
, is_imm
, ra
, rb
):
46 bits
= 32 if w
else 64
49 lst
= [f
"grev{'w' if w else ''}i. 3, 4, {masked_rb}"]
51 lst
= [f
"grev{'w' if w else ''}. 3, 4, 5"]
52 initial_regs
= [0] * 32
57 lst
= list(SVP64Asm(lst
, bigendian
))
58 e
= ExpectedState(pc
=4)
61 dest_bit
= i ^ masked_rb
63 expected |
= 2 ** dest_bit
64 e
.intregs
[3] = expected
67 if expected
& 2 ** 63: # sign extend
72 e
.crregs
[0] = (eq
<< 1) |
(gt
<< 2) |
(lt
<< 3)
73 self
.add_case(Program(lst
, bigendian
), initial_regs
, expected
=e
)
75 def case_ternlogi_0(self
):
76 self
.do_case_ternlogi(False,
77 0x8000_0000_FFFF_0000,
78 0x8000_0000_FF00_FF00,
79 0x8000_0000_F0F0_F0F0, 0x80)
80 self
.do_case_ternlogi(True,
81 0x8000_0000_FFFF_0000,
82 0x8000_0000_FF00_FF00,
83 0x8000_0000_F0F0_F0F0, 0x80)
85 def case_ternlogi_FF(self
):
86 self
.do_case_ternlogi(False, 0, 0, 0, 0xFF)
87 self
.do_case_ternlogi(True, 0, 0, 0, 0xFF)
89 def case_ternlogi_random(self
):
91 rc
= bool(hash_256(f
"ternlogi rc {i}") & 1)
92 imm
= hash_256(f
"ternlogi imm {i}") & 0xFF
93 rt
= hash_256(f
"ternlogi rt {i}") % 2 ** 64
94 ra
= hash_256(f
"ternlogi ra {i}") % 2 ** 64
95 rb
= hash_256(f
"ternlogi rb {i}") % 2 ** 64
96 self
.do_case_ternlogi(rc
, rt
, ra
, rb
, imm
)
98 def case_grev_random(self
):
100 w
= hash_256(f
"grev w {i}") & 1
101 is_imm
= hash_256(f
"grev is_imm {i}") & 1
102 ra
= hash_256(f
"grev ra {i}") % 2 ** 64
103 rb
= hash_256(f
"grev rb {i}") % 2 ** 64
104 self
.do_case_grev(w
, is_imm
, ra
, rb
)
106 def case_grevi_1(self
):
107 self
.do_case_grev(False, True, 14361919363078703450,
110 def case_grevi_2(self
):
111 self
.do_case_grev(True, True, 397097147229333315, 8326716970539357702)
113 def case_grevi_3(self
):
114 self
.do_case_grev(True, True, 0xFFFF_FFFF_0000_0000, 6)